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| 型號(hào)： | SX28AC/SSU |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), I2C BUS CONTROLLER, PDSO28 |
| 封裝： | GREEN, PLASTIC, SSOP-28 |
| 文件頁(yè)數(shù)： | 35/48頁(yè) |
| 文件大小： | 772K |
| 代理商： | SX28AC/SSU |
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2005 Ubicom, Inc. All rights reserved.
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SX20AC/SX28AC
17.2 DC Characteristics
SX20/28AC at 0 - 75MHz (Temp Range: 0
°C <= Ta <= +70°C)
SX20/28AC at 0 - 50MHz (Temp Range: -40
°C <= Ta <= +85°C)
Note 1: Vdd must start rising from Vss to ensure proper Power-On-Reset when relying on the internal Power-On-Reset
circuitry.
Note 2: Under conditions with half of the I/Os loaded to these Ioh conditions, and half of the I/Os loaded to these
Iol conditions. Worst case Ioh/Iol are typically double this if only one pin is loaded.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Vdd
Supply Voltage (Note 1)
Fosc= 0 - 32 MHz
Fosc= 0 - 50 MHz
Fosc= 0 - 75 MHz
2.7
3.0
4.5
-
5.5
V
SVdd
Vdd rise rate (Note 1)
0.05
-
V/ms
Idd
Supply Current, active
Vdd = 5.0V, Fosc = 75 MHz (External OSC)
Vdd = 5.0V, Fosc = 50 MHz (Crystal)
Vdd = 5.0V, Fosc = 4 MHz (Crystal)
Vdd = 2.7V, Fosc = 20 MHz (Crystal)
-
100
77
7.5
17
120
110
15
35
mA
Ipd
Supply Current, power down
Vdd = 3.0V, WDT enabled (before timeout)
Vdd = 3.0V, WDT disabled
Vdd = 4.5V, WDT enabled
Vdd = 4.5V, WDT disabled
-
10
1.0
20
9.0
110
100
A
Vih, Vil
Input Levels
MCLR, OSC1, RTCC
Logic High
Logic Low
All Other Inputs
CMOS
Logic High
Logic Low
TTL (default after reset)
Logic High
Logic Low
0.9Vdd
Vss
0.7Vdd
Vss
2.0
Vss
Vdd
0.1Vdd
Vdd
0.3Vdd
Vdd
0.8
V
Iil
Input Leakage Current,
RTCC Port A, B, C pins
OSC1, MCLR pins
Vin = Vdd or Vss, FUSE bit 6 = 0
-1.0
-30
+1.0
+30
A
Iip
Weak Pullup Current
Vdd = 5.5V, Vin = 0V
Vdd = 3.0V, Vin = 0V
90
20
190
50
A
Voh
Output High Voltage
Ports B, C
Port A
Ioh = 10mA, Vdd = 4.5V, Note 2
Ioh = 8mA, Vdd = 3.0V, Note 2
Ioh = 20mA, Vdd = 4.5V, Note 2
Ioh = 15mA, Vdd = 3.0V, Note 2
Vdd-0.7
V
Vol
Output Low Voltage
All Ports
Iol = 16mA, Vdd = 4.5V, Note 2
Iol = 14mA, Vdd = 3.0V, Note 2
0.6
V
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