參數(shù)資料
型號： ST7PLU09MAE
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO8
封裝： 0.150 INCH, ROHS COMPLIANT, PLASTIC, SOP-8
文件頁數(shù)： 69/124頁
文件大?。?/td> 1995K
代理商： ST7PLU09MAE
ST7LUS5, ST7LU05, ST7LU09
Power saving modes
The compatibility of Watchdog operation with Halt mode is configured by the “WDGHALT”
option bit of the option byte. The HALT instruction when executed while the Watchdog
system is enabled, can generate a Watchdog RESET (see Section 14.1 on page 114 for
more details).
Figure 21.
HALT timing overview
1.
A reset pulse of at least 42s must be applied when exiting from Halt mode.
HALT
RUN
64 CPU CYCLE
DELAY
RESET(1)
OR
INTERRUPT
HALT
INSTRUCTION
FETCH
VECTOR
[Active Halt disabled]
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