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參數(shù)資料
| 型號： | ST7PL05Y0MB/XXXTRE |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | 0.150 INCH WIDTH, PLASTIC, LEAD FREE, SOP-16 |
| 文件頁數(shù)： | 81/106頁 |
| 文件大?。?/td> | 1990K |
| 代理商： | ST7PL05Y0MB/XXXTRE |
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ST7L05, ST7L09
76/104
OPERATING CONDITIONS (Cont’d)
The RC oscillator and PLL characteristics are temperature-dependent and are grouped in two tables.
Operating conditions (tested for TA = -40 to +105°C) @ VDD = 4.5 to 5.5V
Notes:
1. If the RC oscillator clock is selected, to improve clock stability and frequency accuracy, it is recommended to place a
decoupling capacitor, typically 100nF, between the VDD and VSS pins as close as possible to the ST7 device.
3. Minimum value is obtained for hot temperature and maximum value is obtained for cold temperature.
4. Data based on characterization results, not tested in production.
5. Measurement made with RC calibrated at 1 MHz.
6. Guaranteed by design.
7. Averaged over a 4ms period. After the LOCKED bit is set, a period of tSTAB is required to reach ACCPLL accuracy.
8. After the LOCKED bit is set ACCPLL is max. 10% until tSTAB has elapsed. See Figure 11 on page 23.
Operating conditions (tested for TA = -40 to +105°C) @ VDD = 3.0 to 3.6V
1)
Notes:
1 Data based on characterization results, not tested in production.
2 If the RC oscillator clock is selected, to improve clock stability and frequency accuracy, it is recommended to place a
decoupling capacitor, typically 100nF, between the VDD and VSS pins as close as possible to the ST7 device.
4. Minimum value is obtained for hot temperature and maximum value is obtained for cold temperature.
5. Measurement made with RC calibration at 1 MHz.
6. Guaranteed by design.
7. Averaged over a 4ms period. After the LOCKED bit is set, a period of tSTAB is required to reach ACCPLL accuracy.
8. After the LOCKED bit is set ACCPLL is max. 10% until tSTAB has elapsed. See Figure 11 on page 23.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fRC
1)
Internal RC oscillator
frequency
RCCR = FF (reset value), TA = 25°C, VDD =5V
760
kHz
RCCR = RCCR02 ), TA = 25°C, VDD = 5V
995
1000
1005
ACCRC
Accuracy of internal RC
oscillator when calibrated
with RCCR = RCCR02)3)
TA = 25°C, VDD = 5V
-0.5
+0.5
%
TA = 25°C, VDD = 4.5 to 5.5V
4)
-1
+1
TA = -40 to +105°C, VDD = 4.5 to 5.5V
4)
-5
+2
IDD(RC)
RC oscillator current
consumption
TA = 25°C, VDD = 5V
9704)5)
A
tsu(RC)
RC oscillator setup time
TA = 25°C, VDD = 5V
102)
s
fPLL
x8 PLL input clock
1
MHz
tLOCK
PLL lock time8)
2
ms
tSTAB
PLL stabilization time8)
4
ACCPLL
x8 PLL accuracy
fRC =1 MHz@ TA = -40 to +105°C
0.17)
%
JITPLL
PLL jitter (
f
CPU/fCPU)1
6)
IDD(PLL)
PLL current consumption TA = 25°C
6004)
A
Symbol
Parameter1)
Conditions
Min
Typ
Max
Unit
fRC
Internal RC oscillator
frequency
RCCR = FF (reset value), TA = 25°C, VDD = 3.3V
560
kHz
RCCR = RCCR13), TA = 25°C, VDD = 3.3V
700
ACCRC
Accuracy of internal RC
oscillator when calibrated
with RCCR = RCCR13)4)
TA = -40 to +105°C
-15
+15
%
IDD(RC)
RC oscillator current
consumption
TA =25°C, VDD =3.3V
7005)
A
tsu(RC)
RC oscillator setup time
103)
s
1
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