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參數(shù)資料
| 型號： | ST7PL05Y0MB/XXXTRE |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | 0.150 INCH WIDTH, PLASTIC, LEAD FREE, SOP-16 |
| 文件頁數(shù)： | 47/106頁 |
| 文件大?。?/td> | 1990K |
| 代理商： | ST7PL05Y0MB/XXXTRE |
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ST7L05, ST7L09
45/104
LITE TIMER (Cont’d)
Input Capture
The 8-bit input capture register is used to latch the
free-running upcounter after a rising or falling edge
is detected on the LTIC pin. When an input capture
occurs, the ICF bit is set and the LTICR register
contains the value of the free-running upcounter.
An interrupt is generated if the ICIE bit is set. The
ICF bit is cleared by reading the LTICR register.
The LTICR is a read only register and always con-
tains the data from the last input capture. Input
capture is inhibited if the ICF bit is set.
11.1.4 Low Power Modes
11.1.5 Interrupts
Note: The TBF and ICF interrupt events are con-
nected to separate interrupt vectors (see Inter-
rupts chapter).
Timebase and IC events generate an interrupt if
the enable bit is set in the LTCSR register and the
interrupt mask in the CC register is reset (RIM in-
struction).
Figure 27. Input Capture Timing Diagram
Mode
Description
SLOW
No effect on Lite timer
(this peripheral is driven directly by
fOSC/32)
WAIT
No effect on Lite timer
ACTIVE HALT
No effect on Lite timer
HALT
Lite timer stops counting
Interrupt
Event
Flag
Enable
Control
Bit
Exit
from
Wait
Exit
from
Halt
Exit
from
Active-
Halt
Timebase
Event
TBF
TBIE
Yes
No
Yes
IC Event
ICF
ICIE
No
04h
8-bit COUNTER
t
01h
fOSC/32
xxh
02h
03h
05h
06h
07h
04h
LTIC PIN
ICF FLAG
LTICR REGISTER
CLEARED
4s
(@ 8 MHz fOSC)
fCPU
BY S/W
07h
READING
LTIC REGISTER
1
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