參數(shù)資料
型號(hào)： ST72T2311R6T6S
廠商： 意法半導(dǎo)體
英文描述： 8-BIT MCU WITH NESTED INTERRUPTS, EEPROM, ADC, 16-BIT TIMERS, 8-BIT PWM ART, SPI, SCI, CAN INTERFACES
中文描述： 8位嵌套中斷，EEPROM存儲(chǔ)器，模數(shù)轉(zhuǎn)換器，16位定時(shí)器，8位PWM藝術(shù)，SPI和脊髓損傷，微控制器的CAN接口
文件頁數(shù)： 17/164頁
文件大?。?/td> 1043K
代理商： ST72T2311R6T6S
ST72311R, ST72511R, ST72512R, ST72532R
113/164
CONTROLLER AREA NETWORK (Cont’d)
CONTROL/STATUS REGISTER (CSR)
Read/Write
Reset Value: 00h
Bit 6 = BOFF
Bus-Off State
Read Only
Set by hardware to indicate that the node is in bus-
off state, i.e. the Transmit Error Counter exceeds
255.
Reset by hardware to indicate that the node is in-
volved in bus activities.
Bit 5 = EPSV
Error Passive State
Read Only
Set by hardware to indicate that the node is error
passive.
Reset by hardware to indicate that the node is either
error active (BOFF = 0) or bus-off.
Bit 4 = SRTE
Simultaneous Receive/Transmit En-
able
Read/Set/Clear
Set by software to enable simultaneous transmis-
sion and reception of a message passing the ac-
ceptance filtering. Allows to check the integrity of
the communication path.
Reset by software to discard all messages trans-
mitted by the node. Allows remote and data frames
to share the same identifier.
Bit 3 = NRTX
No Retransmission
Read/Set/Clear
Set by software to disable the retransmission of un-
successful messages.
Cleared by software to enable retransmission of
messages until success is met.
Bit 2 = FSYN
Fast Synchronization
Read/Set/Clear
Set by software to enable a fast resynchronization
when leaving standby mode, i.e. wait for only 11 re-
cessive bits in a row.
Cleared by software to enable the standard resyn-
chronization when leaving standby mode, i.e. wait
for 128 sequences of 11 recessive bits.
Bit 1 = WKPS
Wake-up Pulse
Read/Set/Clear
Set by software to generate a dominant pulse when
leaving standby mode.
Cleared by software for no dominant wake-up
pulse.
Bit 0 = RUN
CAN Enable
Read/Set/Clear
Set by software to leave standby mode after 128 se-
quences of 11 recessive bits or just 11 recessive
bits if FSYN is set.
Cleared by software to request a switch to the
standby or low-power mode as soon as any on-go-
ing transfer is complete. Read-back as 1 in the
meantime to enable proper signalling of the standby
state. The CPU clock may therefore be safely
switched OFF whenever RUN is read as 0.
70
0
BOFF
EPSV
SRTE
NRTX
FSYN WKPS
RUN
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ST72T251G1M6 功能描述:8位微控制器 -MCU RO 511-ST72C254G1M6 RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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ST72T251G2M6 功能描述:8位微控制器 -MCU OTP EPROM 8K SPI/I2C RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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