參數(shù)資料
型號： ST72T2311R6T6S
廠商： 意法半導體
英文描述： 8-BIT MCU WITH NESTED INTERRUPTS, EEPROM, ADC, 16-BIT TIMERS, 8-BIT PWM ART, SPI, SCI, CAN INTERFACES
中文描述： 8位嵌套中斷，EEPROM存儲器，模數(shù)轉(zhuǎn)換器，16位定時器，8位PWM藝術(shù)，SPI和脊髓損傷，微控制器的CAN接口
文件頁數(shù)： 106/164頁
文件大?。?/td> 1043K
代理商： ST72T2311R6T6S
ST72311R, ST72511R, ST72512R, ST72532R
46/164
MISCELLANEOUS REGISTERS (Cont’d)
9.3 MISCELLANEOUS REGISTERS
MISCELLANEOUS REGISTER 1 (MISCR1)
Read/Write
Reset Value: 0000 0000 (00h)
Bit 7:6 = IS1[1:0]
ei2 and ei3 sensitivity
The interrupt sensitivity, defined using the IS1[1:0]
bits, is applied to the following external interrupts:
- ei2 (port B3..0)
- ei3 (port B7..4)
These 2 bits can be written only when I1 and I0 of
the CC register are both set to 1 (level 3).
Bit 5 = MCO
Main clock out selection
This bit enables the MCO alternate function on the
PF0 I/O port. It is set and cleared by software.
0: MCO alternate function disabled (I/O pin free for
general-purpose I/O)
1: MCO alternate function enabled (fOSC/2on I/O
port)
Note: To reduce power consumption, the MCO
function is not active in ACTIVE-HALT mode.
Bit 4:3 = IS2[1:0]
ei0 and ei1 sensitivity
The interrupt sensitivity, defined using the IS2[1:0]
bits, is applied to the following external interrupts:
- ei0 (port A3..0)
- ei1 (port F2..0)
These 2 bits can be written only when I1 and I0 of
the CC register are both set to 1 (level 3).
Bit 2:1 = CP[1:0]
CPU clock prescaler
These bits select the CPU clock prescaler which is
applied in the different slow modes. Their action is
conditioned by the setting of the SMS bit. These
two bits are set and cleared by software
Bit 0 = SMS
Slow mode select
This bit is set and cleared by software.
0: Normal mode. fCPU = fOSC /2
1: Slow mode. fCPU is given by CP1, CP0
See Section 7.2 ”SLOW MODE” on page 34 and
Section 10.2 ”MAIN CLOCK CONTROLLER
WITH REAL TIME CLOCK TIMER (MCC/RTC)”
on page 52 for more details.
70
IS11
IS10
MCO
IS21
IS20
CP1
CP0
SMS
IS11 IS10
External Interrupt Sensitivity
MISCR2.IPB=0
MISCR2.IPB=1
00
Falling edge &
low level
Rising edge
& high level
0
1
Rising edge only
Falling edge only
1
0
Falling edge only
Rising edge only
1
Rising and falling edge
IS11 IS10
External Interrupt Sensitivity
0
Falling edge & low level
0
1
Rising edge only
1
0
Falling edge only
1
Rising and falling edge
IS21 IS20
External Interrupt Sensitivity
MISCR2.IPA=0
MISCR2.IPA=1
00
Falling edge &
low level
Rising edge
& high level
0
1
Rising edge only
Falling edge only
1
0
Falling edge only
Rising edge only
1
Rising and falling edge
IS21 IS20
External Interrupt Sensitivity
0
Falling edge & low level
0
1
Rising edge only
1
0
Falling edge only
1
Rising and falling edge
fCPU in SLOW mode
CP1
CP0
fOSC /4
0
fOSC /8
1
0
fOSC /16
0
1
fOSC /32
1
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