參數(shù)資料
型號: ST72T2311R6T3S
廠商: 意法半導(dǎo)體
英文描述: 8-BIT MCU WITH NESTED INTERRUPTS, EEPROM, ADC, 16-BIT TIMERS, 8-BIT PWM ART, SPI, SCI, CAN INTERFACES
中文描述: 8位嵌套中斷,EEPROM存儲器,模數(shù)轉(zhuǎn)換器,16位定時器,8位PWM藝術(shù),SPI和脊髓損傷,微控制器的CAN接口
文件頁數(shù): 61/164頁
文件大?。?/td> 1043K
代理商: ST72T2311R6T3S
ST72311R, ST72511R, ST72512R, ST72532R
153/164
ADC CHARACTERISTICS (Cont’d)
ADC Accuracy with VDD=5.0V
Figure 92. ADC Accuracy Characteristics
Notes:
1. Data based on characterization results over the whole temperature range, monitored in production.
2. ADC Accuracy vs. Negative Injection Current:
For IINJ-=0.8mA, the typical leakage induced inside the die is 1.6A and the effect on the ADC accuracy is a loss of 1 LSB
for each 10K
increase of the external analog source impedance. This effect on the ADC accuracy has been observed
under worst-case conditions for injection:
- negative injection
- injection to an Input with analog capability, adjacent to the enabled Analog Input
-at 5V VDD supply, and worst case temperature.
Symbol
Parameter
Conditions
Min
Max
Unit
|ET|
Total unadjusted error 2)
fCPU=8MHz, fADC=4MHz
1)
1.5
LSB
EO
Offset error 2)
-1
1
EG
Gain Error 2)
-0.5
0.5
|ED|
Differential linearity error 2)
1
|EL|
Integral linearity error 2)
1
EO
EG
1 LSBIDEAL
1LS B
IDE AL
V
DDA
V
SSA
256
----------------------------------------
-
=
Vin (LSBIDEAL)
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
ET=Total Unadjusted Error: maximum deviation
between the actual and the ideal transfer curves.
EO=Offset Error: deviation between the first actual
transition and the first ideal one.
EG=Gain Error: deviation between the last ideal
transition and the last actual one.
ED=Differential Linearity Error: maximum deviation
between actual steps and the ideal one.
EL=Integral Linearity Error: maximum deviation
between any actual transition and the end point
correlation line.
Digital Result ADCDR
255
254
253
5
4
3
2
1
0
7
6
12
34
567
253 254 255 256
(1)
(2)
ET
ED
EL
(3)
VDDA
VSSA
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