參數(shù)資料
型號: ST72F324J4
英文描述: 8-BIT MCU WITH NESTED INTERRUPTS. FLASH. 10-BIT ADC. 4 TIMERS. SPI. SCI INTERFACE
中文描述: 8位微控制器嵌套中斷。閃光。 10位ADC。 4定時器。的SPI。 SCI接口
文件頁數(shù): 105/161頁
文件大?。?/td> 2070K
代理商: ST72F324J4
ST72324
48/161
I/O PORTS (Cont’d)
CAUTION: The alternate function must not be ac-
tivated as long as the pin is configured as input
with interrupt, in order to avoid generating spurious
interrupts.
Analog alternate function
When the pin is used as an ADC input, the I/O
must be configured as floating input. The analog
multiplexer (controlled by the ADC registers)
switches the analog voltage present on the select-
ed pin to the common analog rail which is connect-
ed to the ADC input.
It is recommended not to change the voltage level
or loading on any port pin while conversion is in
progress. Furthermore it is recommended not to
have clocking pins located close to a selected an-
alog pin.
WARNING: The analog input voltage level must
be within the limits stated in the absolute maxi-
mum ratings.
9.3 I/O PORT IMPLEMENTATION
The hardware implementation on each I/O port de-
pends on the settings in the DDR and OR registers
and specific feature of the I/O port such as ADC In-
put or true open drain.
Switching these I/O ports from one state to anoth-
er should be done in a sequence that prevents un-
wanted side effects. Recommended safe transi-
tions are illustrated in Figure 31 Other transitions
are potentially risky and should be avoided, since
they are likely to present unwanted side-effects
such as spurious interrupt generation.
Figure 31. Interrupt I/O Port State Transitions
9.4 LOW POWER MODES
9.5 INTERRUPTS
The external interrupt event generates an interrupt
if the corresponding configuration is selected with
DDR and OR registers and the interrupt mask in
the CC register is not active (RIM instruction).
Mode
Description
WAIT
No effect on I/O ports. External interrupts
cause the device to exit from WAIT mode.
HALT
No effect on I/O ports. External interrupts
cause the device to exit from HALT mode.
Interrupt Event
Event
Flag
Enable
Control
Bit
Exit
from
Wait
Exit
from
Halt
External interrupt on
selected external
event
-
DDRx
ORx
Yes
01
floating/pull-up
interrupt
INPUT
00
floating
(reset state)
INPUT
10
open-drain
OUTPUT
11
push-pull
OUTPUT
XX
= DDR, OR
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