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參數(shù)資料
| 型號(hào)： | ST7267C8T1/XXX |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 30 MHz, RISC MICROCONTROLLER, PQFP48 |
| 封裝： | 7 X 7 MM, LEAD FREE, TQFP-48 |
| 文件頁(yè)數(shù)： | 186/189頁(yè) |
| 文件大?。?/td> | 1643K |
| 代理商： | ST7267C8T1/XXX |
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ST7267C8 ST7267R8
96/189
USB INTERFACE (Cont’d)
FUNCTION ADDRESS (FADDR)
Read/Write
Reset Value: 0000 0000 (00h)
Bit 7 = UPD Update (Read Only).
Set when FADDR is written. Cleared when the
new address takes effect (at the end of the current
transfer).
Bits 6:0 = FAD[6:0] Function address.
These bits are written by software with the function
address provided by the SET_ADDRESS stand-
ard device request (see Universal Serial Bus
Specification Revision 2.0, Chapter 9).
INTERRUPT IN REGISTER (ITINR)
Read only.
Reset value: 0000 0000 (00h)
This register indicates which IN endpoint (1 or 2)
interrupt is currently pending. It also indicates
whether the Endpoint 0 interrupt is currently active
Bit 7:3 = Reserved.
Bit 2 = EP2I Endpoint 2 IN flag.
0: No IN interrupt on endpoint 2
1: IN interrupt on endpoint 2
Bit 1 = EP1I Endpoint 1 IN flag.
0: No IN interrupt on endpoint 1
1: IN interrupt on endpoint 1
Bit 0 = EP0 Endpoint 0 flag.
0: No interrupt on endpoint 0
1: Interrupt on endpoint 0
Note: all pending interrupt flags are cleared when
this register is read.
INTERRUPT OUT REGISTER (ITOUTR)
Read only.
Reset value: 0000 0000 (00h)
This register indicates which OUT Endpoint inter-
rupt is currently pending.
Bit 7:3 = Reserved.
Bit 2 = EP2O Endpoint 2 OUT.
0: No OUT interrupt on endpoint 2
1: OUT interrupt on endpoint 2
Bit 1 = EP1O Endpoint 1 OUT.
0: No OUT interrupt on endpoint 1
1: OUT interrupt on endpoint 1
Bit 0 = Reserved.
Note: all active interrupts are cleared when this
register is read.
INTERRUPT IN ENABLE REGISTER (ITINER)
Read/Write.
Reset value: 0000 0111 (07h)
This register indicates which IN Endpoint (1 or 2)
interrupt is enabled. It also indicates whether the
Endpoint 0 interrupt is enabled.
Bit 7:3 = Reserved.
Bit 2 = EP2IE Endpoint 2 IN Enabled.
0: IN interrupt on endpoint 2 disabled
1: IN interrupt on endpoint 2 enabled
Bit 1 = EP1IE Endpoint 1 IN Enabled.
0: IN interrupt on endpoint 1 disabled
1: IN interrupt on endpoint 1 enabled
70
UPD
FAD6
FAD5
FAD4
FAD3
FAD2
FAD1
FAD0
70
0000
0
EP2I
EP1I
EP0
70
0
EP2O
EP1O
0
70
0
EP2IE
EP1IE
EP0E
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