參數(shù)資料
型號(hào): ST72361AR9TC
廠(chǎng)商: STMICROELECTRONICS
元件分類(lèi): 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64
封裝: 10 X 10 MM, ROHS COMPLIANT, PLASTIC, TQFP-64
文件頁(yè)數(shù): 110/224頁(yè)
文件大?。?/td> 4821K
代理商: ST72361AR9TC
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ST72361-Auto
198/224
CONTROL PIN CHARACTERISTICS (Cont’d)
Figure 112. RESET Pin Protection When LVD Is Enabled1)2)
Figure 113. RESET Pin Protection When LVD Is Disabled1)
Note 1:
1.1 The reset network protects the device against parasitic resets.
1.2 The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad. Otherwise the
device can be damaged when the ST7 generates an internal reset (LVD or watchdog).
1.3 Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin can go below
the VIL max. level specified in Section 12.10.1. Otherwise the reset will not be taken into account internally.
1.4 Because the reset circuit is designed to allow the internal RESET to be output in the RESET pin, the user must ensure
that the current sunk on the RESET pin (by an external pull-up for example) is less than the absolute maximum value
specified for IINJ(RESET) in Section 12.2.2 on page 180.
Note 2:
2.1 When the LVD is enabled, it is mandatory not to connect a pull-up resistor. A 10nF pull-down capacitor is recommend-
ed to filter noise on the reset line.
2.2. In case a capacitive power supply is used, it is recommended to connect a1MW pull-down resistor to the RESET pin
to discharge any residual voltage induced by this capacitive power supply (this will add 5A to the power consumption of
the MCU).
2.3. Tips when using the LVD:
– 1. Check that all recommendations related to reset circuit have been applied (see notes above)
– 2. Check that the power supply is properly decoupled (100nF + 10F close to the MCU). Refer to AN1709. If this
cannot be done, it is recommended to put a 100nF + 1MW pull-down on the RESET pin.
– 3. The capacitors connected on the RESET pin and also the power supply are key to avoiding any start-up margin-
ality. In most cases, steps 1 and 2 above are sufficient for a robust solution. Otherwise: Replace 10nF pull-down on
the RESET pin with a 5F to 20F capacitor.
0.01F
ST72XXX
PULSE
GENERATOR
Filter
RON
VDD
WATCHDOG
LVD RESET
INTERNAL
RESET
EXTERNAL
Recommended
1M
Optional
(note 2.2)
0.01F
EXTERNAL
RESET
CIRCUIT
USER
VDD
4.7k
Required
ST72XXX
PULSE
GENERATOR
Filter
RON
VDD
WATCHDOG
INTERNAL
RESET
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