參數(shù)資料
型號(hào)： ST6235BQ1
廠商： 意法半導(dǎo)體
英文描述： 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, 16-BIT AUTO-RELOAD TIMER, EEPROM, SPI AND UART
中文描述： 8位檢察官辦公室/存儲(chǔ)器與阿微控制器/ D轉(zhuǎn)換器，16位自動(dòng)重加載定時(shí)器，EEPROM中，SPI和UART
文件頁(yè)數(shù)： 59/82頁(yè)
文件大?。?/td> 617K
代理商： ST6235BQ1
59/82
ST62T35B/E35B
4.6 SERIAL PERIPHERAL INTERFACE (SPI)
The on-chip SPI is an optimized serial synchro-
nous interface that supports a wide range of in-
dustry standard SPI specifications. The on-chip
SPI is controlled by small and simple user soft-
ware to perform serial data exchange. The serial
shift clock can be implemented either by software
(using the bit-set and bit-reset instructions), with
the on-chip Timer 1 by externally connecting the
SPI clock pin to the timer pin or by directly apply-
ing an external clock to the Scl line.
The peripheral is composed by an 8-bit Data/shift
Register and a 4-bit binary counter while the Sin
pin is the serial shift input and Sout is the serial
shift output. These two lines can be tied together
to implement two wires protocols
(I C-b
us, etc).
When data is serialized, the MSB is the first bit.
Sin has to be programmed as input. For serial out-
put operation Sout has to be programmed as
open-drain output.
The SCL, Sin and Sout SPI clock and data signals
are connected to 3 I/O lines on the same external
pins. With these 3 lines, the SPI can operate in the
following operating modes: Software SPI, S-BUS,
I
C-bu
s and as a standard serial I/O (clock, data,
enable). An interrupt request can be generated af-
ter eight clock pulses. Figure 35. shows the SPI
block diagram.
The SCL line clocks, on the falling edge, the shift
register and the counter. To allow SPI operation in
slave mode, the SCL pin must be programmed as
input and an external clock must be supplied to
this pin to drive the SPI peripheral.
In master mode, SCL is programmed as output, a
clock signal must be generated by software to set
and reset the port line.
Figure 35. SPI Block Diagram
Set Res
CLK
RESET
4-Bit Counter
(Q4=High after Clock8)
Data Reg
Direction
I/O Port
8-Bit Data
Shift Register
Reset
Load
DOUT
Output
Enable
8-Bit Tristate Data I/O
RESET
I/O Port
I/O Port
CP
CP
DIN
D0............... .............D7
to Processor Data Bus
Q4
Q4
OPR Reg.
DIN
SCL
Sin
Sout
SPI Interrupt Disable Register
SPI Data Register
Data Reg
Direction
Data Reg
Direction
DOUT
Write
Read
M0
1
Interrupt
VR01504
58
相關(guān)PDF資料
PDF描述
ST62T35B 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, 16-BIT AUTO-RELOAD TIMER, EEPROM, SPI AND UART
ST62E35B 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, 16-BIT AUTO-RELOAD TIMER, EEPROM, SPI AND UART
ST6235BQ3 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, 16-BIT AUTO-RELOAD TIMER, EEPROM, SPI AND UART
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST6235BQ1/XXX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
ST6235BQ3 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, 16-BIT AUTO-RELOAD TIMER, EEPROM, SPI AND UART
ST6235BQ3/XXX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
ST6235BQ6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, 16-BIT AUTO-RELOAD TIMER, EEPROM, SPI AND UART
ST6235BQ6/XXX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
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