參數(shù)資料
型號： ST6235BQ1
廠商： 意法半導(dǎo)體
英文描述： 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, 16-BIT AUTO-RELOAD TIMER, EEPROM, SPI AND UART
中文描述： 8位檢察官辦公室/存儲(chǔ)器與阿微控制器/ D轉(zhuǎn)換器，16位自動(dòng)重加載定時(shí)器，EEPROM中，SPI和UART
文件頁數(shù)： 57/82頁
文件大?。?/td> 617K
代理商： ST6235BQ1
57/82
ST62T35B/E35B
4.5.4 DATA RECEPTION
The UART continuously looks for a falling edge on
the input pin whenever a transmission is not ac-
tive. Once an edge is detected it waits 1 bit time (8
states) to accommodate the Start bit, and then as-
sembles the following serial data stream into the
data register. The data in the ninth bit position is
copied into Bit 9, replacing any previous value set
for transmission. After all 9 bits have been re-
ceived, the Receiver waits for the duration of one
bit (for the Stop bit) and then transfers the re-
ceived data into the buffer register, allowing a fol-
lowing character to be received. The interrupt flag
RXRDY is set to 1 as the data is transferred to the
buffer register and, if enabled, will generate an in-
terrupt.
If a transmission is started during the course of a
reception, the transmission takes priority and the
reception is stopped to free the resources for the
transmission. This implies that a handshaking sys-
tem must be implemented, as polling of the UART
to detect reception is not available.
Figure 34. .UART Data Output
4.5.5 INTERRUPT CAPABILITIES
Both reception and transmission processes can
induce interrupt to the core as defined in the inter-
rupt section. These interrupts are enabled by set-
ting TXIEN and RXIEN bit in the UARTCR regis-
ter, and TXMT and RXRDY flags are set accord-
ingly to the interrupt source.
4.5.6 REGISTERS
UART Data Register (UARTDR)
Address: D6h, Read/Write
Bit7-Bit0. UART data bits A write to this register
loads the data into the transmit shift register and
triggers the start of transmission. In addition this
resets the transmit interrupt flag TXMT. A read of
this register returns the data from the Receive
buffer.
Warning
. No Read/Write Instructions may be
used with this register as both transmit and re-
ceive share the same address
Table 18.. Baudrate Selection
TXD1
TXD
PORT DATA
OUTPUT
0
MUX
1
UARTOE
VR02011
7
0
D7
D6
D5
D4
D3
D2
D1
D0
BR2
BR2
BR0
f
INT
Division
Baud Rate
f
INT
= 8MHz
1200
2400
4800
9600
19200
31200
38400
Reserved
f
INT
= 4MHz
600
1200
2400
4800
9600
15600
19200
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
6.656
3.328
1.664
832
416
256
208
56
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ST6235BQ3 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, 16-BIT AUTO-RELOAD TIMER, EEPROM, SPI AND UART
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