參數(shù)資料
型號: ST16C650AIP40
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: 2.90V TO 5.5V UART WITH 32-BYTE FIFO
中文描述: 1 CHANNEL(S), 3.125M bps, SERIAL COMM CONTROLLER, PDIP40
封裝: 0.600 INCH, PLASTIC, DIP-40
文件頁數(shù): 37/53頁
文件大?。?/td> 666K
代理商: ST16C650AIP40
á
REV. 5.0.0
ST16C650A
2.90V TO 5.5V UART WITH 32-BYTE FIFO
37
EFR[6]: Auto RTS Flow Control Enable
RTS# output may be used for hardware flow control by setting EFR bit-6 to logic 1. When Auto RTS is
selected, an interrupt will be generated (if IER bit-6 = 1) when the receive FIFO is filled to the programmed
trigger level and RTS de-asserts to a logic 1 at the next upper trigger level. RTS# will return to a logic 0 when
FIFO data falls below the next lower trigger level. The RTS# output must be asserted (logic 0) before the auto
RTS can take effect. RTS# pin will function as a general purpose output when hardware flow control is
disabled.
Logic 0 = Automatic RTS flow control is disabled. (default)
Logic 1 = Enable Automatic RTS flow control.
EFR[7]: Auto CTS Flow Control Enable
Automatic CTS Flow Control.
Logic 0 = Automatic CTS flow control is disabled. (default)
Logic 1 = Enable Automatic CTS flow control. Data transmission stops when CTS# input de-asserts to logic
1. Data transmission resumes when CTS# input returns to a logic 0.
4.17
Software Flow Control Registers (XOFF1, XOFF2, XON1, XON2) - Read/Write
These registers are used as the programmable software flow control characters xoff1, xoff2, xon1, and xon2.
For more details, see
Table 5
.
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