參數(shù)資料
型號: ST16C650AIP40
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: 2.90V TO 5.5V UART WITH 32-BYTE FIFO
中文描述: 1 CHANNEL(S), 3.125M bps, SERIAL COMM CONTROLLER, PDIP40
封裝: 0.600 INCH, PLASTIC, DIP-40
文件頁數(shù): 22/53頁
文件大?。?/td> 666K
代理商: ST16C650AIP40
ST16C650A
2.90V TO 5.5V UART WITH 32-BYTE FIFO
á
REV. 5.0.0
22
2.18
The 650A UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode
is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 15
shows how the modem port signals are re-configured. Transmit data from the transmit shift register
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX pin is held at logic 1 or mark condition while RTS# and DTR# are de-asserted, and
CTS#, DSR# CD# and RI# inputs are ignored. Caution: the RX input must be held to a logic 1 during loopback
test else upon exiting the loopback test the UART may detect and report a false “break” signal. Also, Auto
RTS/CTS is not supported during internal loopback.
Internal Loopback
F
IGURE
15. I
NTERNAL
L
OOP
B
ACK
TX
RX
M
I
RTS#
MCR bit-4=1
VCC
VCC
Transmit Shift Register
(THR/FIFO)
Receive Shift Register
(RHR/FIFO)
CTS#
DTR#
DSR#
RI#
CD#
OP1#
OP2#
RTS#
CTS#
DTR#
DSR#
RI#
CD#
VCC
VCC
OP2#
VCC
OP1#
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