參數(shù)資料
型號(hào)： ST16C650AIJ44
廠商： EXAR CORP
元件分類： 微控制器/微處理器
英文描述： 2.90V TO 5.5V UART WITH 32-BYTE FIFO
中文描述： 1 CHANNEL(S), 3.125M bps, SERIAL COMM CONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 15/53頁
文件大?。?/td> 666K
代理商： ST16C650AIJ44
á
REV. 5.0.0
ST16C650A
2.90V TO 5.5V UART WITH 32-BYTE FIFO
15
2.9.1
The transmit holding register is an 8-bit register providing a data interface to the host processor. The host
writes transmit data byte to the THR to be converted into a serial data stream including a start bit, data bits,
parity bit and stop bit(s). The least-significant-bit (Bit-0) is the first data bit to go out. The THR is the input
register to the transmit FIFO of 32 bytes when FIFO operation is enabled by FCR bit-0. Every time a write
operation is made to the THR, the FIFO data pointer is automatically bumped to the next sequential data
location.
2.9.2
Transmitter Operation in non-FIFO Mode
The host loads transmit data to THR one character at a time. The THR empty flag (LSR bit-5) is set when the
data byte is transferred to TSR. THR flag can generate a transmit empty interrupt (ISR bit-1) when it is enabled
by IER bit-1. The TSR flag (LSR bit-6) is set when TSR becomes completely empty.
Transmit Holding Register (THR) - Write Only
2.9.3
The host may fill the transmit FIFO with up to 32 bytes of transmit data. The THR empty flag (LSR bit-5) is set
whenever the FIFO is empty. The THR empty flag can generate a transmit empty interrupt (ISR bit-1) when the
amount of data in the FIFO falls below its programmed trigger level. The transmit empty interrupt is enabled by
IER bit-1. The TSR flag (LSR bit-6) is set when TSR/FIFO becomes empty.
Transmitter Operation in FIFO Mode
F
IGURE
9. T
RANSMITTER
O
PERATION
IN
NON
-FIFO M
ODE
F
IGURE
10. T
RANSMITTER
O
PERATION
IN
FIFO
AND
F
LOW
C
ONTROL
M
ODE
Transmit
Holding
Register
(THR)
Transmit Shift Register (TSR)
Data
Byte
L
S
B
M
S
B
THR Interrupt (ISR bit-1)
Enabled by IER bit-1
TXNOFIFO1
16X Clock
Transmit Data Shift Register
(TSR)
Transmit
Data Byte
THR Interrupt (ISR bit-1) falls
below the programmed Trigger
Level and then when becomes
empty. FIFO is Enabled by FCR
bit-0=1
Transmit
FIFO
16X Clock
Auto CTS Flow Control (CTS# pin)
Auto Software Flow Control
Flow Control Characters
(Xoff1/2 and Xon1/2 Reg.
TXFIFO1
相關(guān)PDF資料
PDF描述
ST16C650AIP40 2.90V TO 5.5V UART WITH 32-BYTE FIFO
ST16C650AIQ48 2.90V TO 5.5V UART WITH 32-BYTE FIFO
ST16C650 Voltage Regulator IC; Output Current Max:350mA; Supply Voltage Max:6V; Package/Case:8-TSSOP; Output Current:350mA; Output Voltage:3.3V; Current Rating:30.05A; Leaded Process Compatible:Yes; Output Voltage Max:3.3V RoHS Compliant: Yes
ST26C32CF16 QUAD RS-422, RS-423 CMOS Differential Line Receiver
ST26C32 MOSFET; Transistor Polarity:N Channel; Drain Source Voltage, Vds:20V; Continuous Drain Current, Id:13.4A; On-Resistance, Rds(on):0.0065ohm; Rds(on) Test Voltage, Vgs:4.5V; Package/Case:8-SOIC; Leaded Process Compatible:No
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST16C650AIJ44-F 功能描述:UART 接口集成電路 UART W/32BYTEFIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
ST16C650AIP40 制造商:EXAR 制造商全稱:EXAR 功能描述:2.90V TO 5.5V UART WITH 32-BYTE FIFO
ST16C650AIQ48 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述:UART, 48 Pin, Plastic, TQFP
ST16C650AIQ48-F 功能描述:UART 接口集成電路 UART W/32BYTEFIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
ST16C650AIQ48TR 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*