參數(shù)資料
型號(hào)： ST16C1451CQ48
廠商： STARTECH SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 2.97V TO 5.5V UART
中文描述： 1 CHANNEL(S), 448K bps, SERIAL COMM CONTROLLER, PQFP48
文件頁(yè)數(shù)： 18/32頁(yè)
文件大?。?/td> 355K
代理商： ST16C1451CQ48
ST16C1450/51
2.97V TO 5.5V UART
á
REV. 4.2.0
18
LCR[5]: TX and RX Parity Select
If the parity bit is enabled, LCR BIT-5 selects the forced parity format.
LCR[5] = logic 0, parity is not forced (default).
LCR[5] = logic 1 and LCR[4] = logic 0, parity bit is forced to a logical 1 for the transmit and receive data.
LCR[5] = logic 1 and LCR[4] = logic 1, parity bit is forced to a logical 0 for the transmit and receive data.
LCR[6]: Transmit Break Enable
When enabled, the Break control bit causes a break condition to be transmitted (the TX output is forced to a
“space’, logic 0, state). This condition remains, until disabled by setting LCR bit-6 to a logic 0.
Logic 0 = No TX break condition (default).
Logic 1 = Forces the transmitter output (TX) to a “space”, logic 0, for alerting the remote receiver of a line
break condition.
LCR[7]: Baud Rate Divisors Enable
Baud rate generator divisor (DLL/DLM) enable.
Logic 0 = Data registers are selected (default).
Logic 1 = Divisor latch registers are selected.
4.6
Modem Control Register (MCR) or General Purpose Outputs Control - Read/Write
The MCR register is used for controlling the serial/modem interface signals or general purpose inputs/outputs.
MCR[0]: DTR# Output
The DTR# pin is a modem control output. If the modem interface is not used, this output may be used as a
general purpose output.
Logic 0 = Force DTR# output to a logic 1 (default).
Logic 1 = Force DTR# output to a logic 0.
MCR[1]: RTS# Output
The RTS# pin is a modem control output. If the modem interface is not used, this output may be used as a
general purpose output.
Logic 0 = Force RTS# output to a logic 1 (default).
Logic 1 = Force RTS# output to a logic 0.
T
ABLE
5: P
ARITY
SELECTION
LCR B
IT
-5 LCR B
IT
-4 LCR B
IT
-3
P
ARITY
SELECTION
X
X
0
No parity
0
0
1
Odd parity
0
1
1
Even parity
1
0
1
Force parity to mark,
“1”
1
1
1
Forced parity to
space, “0”
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