參數(shù)資料
型號: SST85LP1004B-M-C-LFTE
元件分類: 存儲控制器/管理單元
英文描述: IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA91
封裝: 14 X 24 MM, 1.30 MM HEIGHT, ROHS COMPLIANT, BGA-91
文件頁數(shù): 23/36頁
文件大?。?/td> 910K
代理商: SST85LP1004B-M-C-LFTE
2010 Silicon Storage Technology, Inc.
S71420-01-000
04/10
3
4 GByte NANDrive
SST85LP1004B
Advance Information
General Description
Each NANDrive contains an integrated NAND Controller and NAND Flash dies in a LBGA package.
Refer to Figure 1 for the NANDrive block diagram.
Performance-optimized NANDrive
The heart of the NANDrive is the NAND Controller which translates standard ATA signals into flash
media data and control signals. The following components contribute to the NANDrive’s operation.
Microcontroller Unit (MCU)
The 32-bit RISC architecture transfers the ATA/IDE commands into data and control signals required
for flash media operation.
Power Management Unit (PMU)
The power management unit controls the power consumption of the NANDrive. The PMU dramatically
reduces the power consumption of the NANDrive by putting the part of the circuitry that is not in oper-
ation into sleep mode.
The Flash File System handles inadvertent power interrupts and has auto-recovery capability to insure
NANDrive data integrity. For regular power management, the Host must send an Idle_Immediate com-
mand and wait for command ready before powering down the NANDrive.
SRAM Buffer
A contributor to the NANDrive performance is an SRAM buffer. The buffer optimizes the host’s data
transfer to and from the flash media.
Embedded Flash File System
The embedded flash file system is an integral part of the NANDrive. It contains MCU firmware that per-
forms the following tasks:
1.
Translates host side signals into flash media writes and reads.
2.
Provides flash media wear leveling to spread the flash writes across all memory address
space to increase the longevity of flash media.
3.
Keeps track of data file structures.
4.
Stores the data in Flash media upon completion of a Write command. The NANDrive does
not do Post-Write operations, except for when the write cache is enabled by the Host com-
mand.
Serial Communication Interface (SCI)
The Serial Communication Interface (SCI) is designed for manufacturing error reporting. During the
design process, always provide access to the SCI interface in the PCB design to aid in design valida-
tion.
Multi-tasking Interface
The multi-tasking interface enables fast, sustained write performance by allowing concurrent Read,
Program, and Erase operations to multiple flash media devices.
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