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參數(shù)資料
| 型號： | SST55VD020-60-I-TQWE |
| 元件分類： | 存儲控制器/管理單元 |
| 英文描述： | IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, ROHS COMPLIANT, MS-026, TQFP-100 |
| 文件頁數(shù)： | 16/45頁 |
| 文件大?。?/td> | 666K |
| 代理商： | SST55VD020-60-I-TQWE |
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Data Sheet
NAND Controller
SST55VD020
2009 Silicon Storage Technology, Inc.
S71355-03-000
07/09
23
Word 57-58: Current Capacity
This field contains the product of the current cylinders times heads times sectors.
Word 59: Multiple Sector Setting
This field contains a validity flag in the Odd Byte and the current number of sectors that can be transferred per
interrupt for Read/Write Multiple in the Even Byte. The Odd Byte is always 01H which indicates that the Even
Byte is always valid.
The Even Byte value depends on the value set by the Set Multiple command. The Even Byte of this word by
default contains a 00H which indicates that Read/Write Multiple commands are not valid.
Word 60-61: Total Sectors Addressable in LBA Mode
This field contains the number of sectors addressable for the NAND Controller in LBA mode only.
Word 63: Multi-word DMA Transfer Mode
This field identifies the multi-word DMA transfer modes supported by the NAND Controller and indicates the
mode that is currently selected. Only one DMA mode can be selected at any given time.
Bit
Function
15-11
Reserved
10
Multi-word DMA mode 2 selected
1: Multi-word DMA mode 2 is selected and bits 8 and 9 are cleared to 0
0: Multi-word DMA mode 2 is not selected.
9
Multi-word DMA mode 1 selected
1: Multi-word DMA mode 1 is selected and 8 and 10 should be cleared to 0.
0: Multi-word DMA mode 1 is not selected.
8
Multi-word DMA mode 0 selected
1: Multi-word DMA mode 0 is selected and bits 9 and 10 are cleared to 0.
0: Multi-word DMA mode 0 is not selected.
7-3
Reserved
2
Multi-word DMA mode 2 supported
1: Multi-word DMA mode 2 and below are supported and Bits 0 and 1 are set to 1.
1
Multi-word DMA mode 1 supported
1: Multi-word DMA mode 1 and below are supported.
0
Multi-word DMA mode 0 supported
1: Multi-word DMA mode 0 is supported.
Word 64: Advanced PIO Data Transfer Mode
Bits (7:0) is defined as the PIO data and register transfer supported field. If this field is supported, bit 1 of word
53 shall be set to one. This field is bit significant. Any number of bits may be set to one in this field by the device
to indicate the PIO modes the device is capable of supporting. Of these bits, bits (7:2) are Reserved for future
PIO modes.
Bit
Function
0
1: NAND Controller supports PIO Mode-3.
1
1: NAND Controller supports PIO Mode-4.
Word 65: Minimum Multi-word DMA Transfer Cycle Time Per Word
This field defines the minimum Multi-word DMA transfer cycle time per word. This field defines, in nanoseconds,
the minimum cycle time that the NAND Controller supports when performing Multi-word DMA transfers on a per
word basis. SST’s NAND Controller supports up to Multi-word DMA Mode-2, so this field is set to 120ns.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SST55VD020-60-I-TQWE-TM024 | 功能描述:閃存 ATA Media 60MHz 3.3V Industrial RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| SST58LD008 | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:ATA-Disk Chip |
| SST58LD008-70-C-P1H | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:ATA-Disk Chip |
| SST58LD016 | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:ATA-Disk Chip |
| SST58LD016-70-C-P1H | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:ATA-Disk Chip |
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