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| 型號： | SPLC782A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 16COM/40SEG Controller/Driver |
| 中文描述： | 16COM/40SEG控制器/驅(qū)動器 |
| 文件頁數(shù)： | 22/40頁 |
| 文件大?。?/td> | 1670K |
| 代理商： | SPLC782A |
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SPLC782A
5.15.7. 1/16 Duty, type-B waveform
Sunplus Technology Co., Ltd.
Proprietary & Confidential
22
FEB. 15, 2005
Version: 1.7
Figure 5-35:
1/16 Duty type-B waveform
5.16. Register --- IR (Instruction Register) and DR (Data
Register)
SPLC782A has two 8-bit registers - IR (instruction register) and
DR (data register). In the followings, we can use the
combinations of the RS pin and the R/W pin to select the IR and
DR.
RS
R/W
Operation
0
0
IR write (Display clear, etc.)
0
1
Read busy flag (DB7) and address counter
(DB0 - DB6)
1
0
DR write (DR to Display data RAM or Character
generator RAM)
1
1
DR read (Display data RAM or Character
generator RAM to DR)
5.17. Busy Flag (BF)
When RS = 0 and R/W = 1, the busy flag is output to DB7. As
the busy flag = 1, SPLC782A is in busy state and does not accept
any instructions until the busy flag = 0.
5.18. Address Counter (AC)
The address counter assigns addresses to display data RAM and
character generator RAM. When an instruction for address is
written in IR, the address information is sent from IR to AC. After
writing into (or reading from)display data RAM or character
generator RAM, AC is automatically incremented by +1 (or
decremented by -1). AC contents are output to DB0 - DB6 when
RS = 0 and R/W = 1.
5.19. Segment Data Direction
SHL is the segment data shift direction control pin.
LCD data is shifted from SEG1 to SEG80 by connecting SHL to
VSS, and is reversed by connecting SHL to VDD.
5.20. Common Data Direction
DIRC is the common data shift direction control pin.
LCD common scan sequence from COM1 to COM16 by
connecting DIRC to VSS, and is reversed by connecting DIRC to
VDD.
5.21. I/O Port Configuration
5.21.1. Input port: E
Figure 5-36:
Input port: E Configuration
5.21.2. Input port: R/W, RS
Figure 5-37:
Input port: RW, RS Configuration
1 2
15 16 1 2
200 clocks
VPP
V1
V2
V4
VSS
COM1
1 Frame
1 Frame
15 16 1 2
1 frame = 4(
s) x 200 x 16 = 12800(
s) = 12.8ms
1
ency
Framefrequ
SunpusConidenia
78.1(Hz)
12.8(ms)
V3
PMOS
NMOS
VDD
PMOS
NMOS
PMOS
VDD
VDD
Fo PARTMNERUseOny
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