參數資料
型號: SPL505YC264BT
廠商: SILICON LABORATORIES
元件分類: 時鐘產生/分配
英文描述: 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO64
封裝: 6 X 17 MM, LEAD FREE, MO-153, TSSOP-64
文件頁數: 18/27頁
文件大?。?/td> 314K
代理商: SPL505YC264BT
SPL505YC264BT
Rev 1.4 May 21, 2007
Page 25 of 27
For CPU, SRC, and DOT96 Signals and Reference
The following diagram shows the test load configuration for the differential CPU and SRC outputs.
33
Measurement
Point
2 pF
50
L1
L2
33
Measurement
Point
2 pF
50
L1
L2
L1 = 0.5", L2 = 7"
OUT+
OUT-
Figure 12. 0.7V Differential Load Configuration
Figure 13. Differential Measurement for Differential Output Signals (for AC Parameters Measuremement
Figure 14. Single-ended Measurement for Differential Output Signals (for AC Parameters Measurement)
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