參數(shù)資料
型號(hào): SPEAR300-2
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 333 MHz, RISC MICROCONTROLLER, PBGA289
封裝: 15 X 15 MM, 1.70 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, LFBGA-289
文件頁(yè)數(shù): 55/83頁(yè)
文件大?。?/td> 1027K
代理商: SPEAR300-2
SPEAr300
Timing requirements
Doc ID 16324 Rev 2
59/83
6.1.3
DDR2 command timings
Figure 11.
DDR2 Command waveforms
Figure 12.
DDR2 Command path
6.2
CLCD timing characteristics
The characterization timing is done considering an output load of 10 pF on all the
outputs.The operating conditions are in worst case V=0.90 V T=125 °C and in best case V
=1.10 V T= 40° C.
The CLCD has a wide variety of configurations and setting and the parameters change
accordingly. Two main scenarios will be considered, one with direct clock to output (166
Table 28.
DDR2 Command timings
Frequency
t4 max
t5 max
Unit
333 MHz
1.39
1.40
ns
266 MHz
1.77
1.78
ns
200 MHz
2.39
2.40
ns
166 MHz
2.90
2.91
ns
133 MHz
3.65
3.66
ns
t4
t5
CLK
ADDRESS, STROBEs,
AND CONTROL LINES
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