• <dl id="z9tup"><span id="z9tup"><pre id="z9tup"></pre></span></dl>
    <nobr id="z9tup"><sup id="z9tup"></sup></nobr>
    <dl id="z9tup"><dfn id="z9tup"><code id="z9tup"></code></dfn></dl>
  • 參數(shù)資料
    型號: SPC5121YVY400BR
    廠商: FREESCALE SEMICONDUCTOR INC
    元件分類: 微控制器/微處理器
    英文描述: RISC PROCESSOR, PBGA516
    封裝: 27 X 27 MM, 2.25 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, PLASTIC, TFBGA-516
    文件頁數(shù): 52/86頁
    文件大?。?/td> 719K
    代理商: SPC5121YVY400BR
    MPC5121E/MPC5123 Data Sheet, Rev. 3
    Electrical and Thermal Characteristics
    Freescale Semiconductor
    56
    3.3.10
    SATA PHY
    1.5 Gbps SATA PHY Layer
    See “Serial ATA: High Speed Serialized AT Attachment” Revision 1.0a, 7-January-2003.
    3.3.11
    FEC
    AC Test Timing Conditions:
    Output Loading
    All Outputs: 25 pF
    t2cyc
    t2cyc = time_cyc * 2 * T
    calculate and
    programming
    time_cyc, see
    Reference Manual
    A9.68
    trfs1
    trfs
    trfs = 1.6 * T + tsui + tco + tbuf + tbuf
    A9.69
    tdzfs
    tdzfs = time_dzfs * T – (tskew1)
    calculate and
    programming
    time_dzfs, see
    Reference Manual
    A9.70
    tss
    tss = time_ss * T – (tskew1 + tskew2)
    calculate and
    programming time_ss,
    see Reference Manual
    A9.71
    tmli
    tdzfs_mli
    tdzfs_mli =max(time_dzfs, time_mli) * T – (tskew1
    + tskew2)
    A9.72
    tli
    tli1
    tli1 > 0
    A9.73
    tli
    tli2
    tli2 > 0
    A9.74
    tli
    tli3
    tli3 > 0
    A9.75
    tcvh
    tcvh = (time_cvh *T) – (tskew1 + tskew2)
    calculate and
    programming
    time_cvh, see
    Reference Manual
    A9.76
    ton
    toff
    ton = time_on * T – tskew1
    toff = time_off * T – tskew1
    A9.77
    Table 31. MII Rx Signal Timing
    Sym
    Description
    Min
    Max
    Unit
    SpecID
    t1
    RXD[3:0], RX_DV, RX_ER to RX_CLK setup
    5
    ns
    A11.1
    t2
    RX_CLK to RXD[3:0], RX_DV, RX_ER hold
    5
    ns
    A11.2
    t3
    RX_CLK pulse width high
    35%
    65%
    RX_CLK Period1
    A11.3
    t4
    RX_CLK pulse width low
    35%
    65%
    RX_CLK Period1
    A11.4
    Table 30. Timing Parameters UDMA Out Burst (continued)
    ATA
    Parameter
    UDMA Out
    Timing
    Parameter
    Value
    How to meet
    SpecID
    相關(guān)PDF資料
    PDF描述
    MPC601CQ50A RISC PROCESSOR
    MPC601CQ66A 32-BIT, 66 MHz, RISC PROCESSOR, CQFP304
    MPC604ERX300XX RISC PROCESSOR, CBGA255
    MPC7410RX550PE 32-BIT, 550 MHz, RISC PROCESSOR, CBGA360
    MPC7410RX450PER2 32-BIT, 450 MHz, RISC PROCESSOR, CBGA360
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    SPC5123YVY300B 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Advance Information
    SPC5123YVY300BR 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Advance Information
    SPC5123YVY400B 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:e300 Power Architecture processor core
    SPC5123YVY400BR 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:e300 Power Architecture processor core
    SPC5125 制造商:ELECTROMAGNETIC CORPORATI 功能描述:_