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參數資料
| 型號： | SN74LVTH18504APM |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVT SERIES, 20-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, PQFP64 |
| 封裝： | PLASTIC, QFP-64 |
| 文件頁數： | 31/40頁 |
| 文件大?。?/td> | 594K |
| 代理商： | SN74LVTH18504APM |
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B-Port Outputs of 'LVTH182504A Devices Have Equivalent 25-
Series Resistors, So No External Resistors Are Required
Compatible With the IEEE Std 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture
SCOPE Instruction Set
IEEE Std 1149.1-1990 Required Instructions and Optional CLAMP and HIGHZ
Parallel-Signature Analysis at Inputs
Pseudo-Random Pattern Generation From Outputs
Sample Inputs/Toggle Outputs
Binary Count From Outputs
Device Identification
Even-Parity Opcodes
Packaged in 64-Pin Plastic Thin Quad Flat (PM) Packages Using 0.5-mm Center-to-Center Spacings and 68-Pin Ceramic Quad Flat (HV)
Packages Using 25-mil Center-to-Center Spacings
SCOPE, UBT, and Widebus are trademarks of Texas Instruments Incorporated.
The 'LVTH18504A and 'LVTH182504A scan test devices with 20-bit universal bus transceivers are members of the Texas Instruments (TI)
SCOPE testability integrated-circuit family. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of
complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.
Additionally, these devices are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface
to a 5-V system environment.
In the normal mode, these devices are 20-bit universal bus transceivers that combine D-type latches and D-type flip-flops to allow data flow
in transparent, latched, or clocked modes. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at
the device pins or to perform a self-test on the boundary-test cells. Activating the TAP in the normal mode does not affect the functional
operation of the SCOPE universal bus transceivers.
Data flow in each direction is controlled by output-enable (
and
), latch-enable (LEAB and LEBA), clock-enable (
and
), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode
when LEAB is high. When LEAB is low, the A-bus data is latched while
is high and/or CLKAB is held at a static low or high logic
level. Otherwise, if LEAB is low and
is low, A-bus data is stored on a low-to-high transition of CLKAB. When
is low,
the B outputs are active. When
is high, the B outputs are in the high-impedance state. B-to-A data flow is similar to A-to-B data
flow, but uses the
, LEBA,
, and CLKBA inputs.
In the test mode, the normal operation of the SCOPE universal bus transceivers is inhibited, and the test circuitry is enabled to observe and
control the I/O boundary of the device. When enabled, the test circuitry performs boundary-scan test operations according to the protocol
described in IEEE Std 1149.1-1990.
Four dedicated test pins are used to observe and control the operation of the test circuitry: test data input (TDI), test data output (TDO),
test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing functions, such as parallel-signature
analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are
synchronized to the TAP interface.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The B-port outputs of 'LVTH182504A, which are designed to source or sink up to 12 mA, include equivalent 25-
series resistors to reduce
overshoot and undershoot.
Description
Page 2 of 5
3.3-V ABT Scan Test Devices With 20-Bit Universal Bus Transceivers - SN74LVTH18504A - TI Product Folder
30-Apr-2007
file://C:\Downloads\sn74lvth18504a.html
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74LVTH18504APMG4 | 功能描述:特定功能邏輯 3.3-V ABT w/20-Bit Univ Bus Transceiver RoHS:否 制造商:Texas Instruments 產品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SN74LVTH18504APMR | 功能描述:特定功能邏輯 10-Bit Bus/MOS Mem Drv RoHS:否 制造商:Texas Instruments 產品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SN74LVTH18511DGGR | 功能描述:總線收發(fā)器 Octal 25 Ohm Bus Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74LVTH18512DGGR | 功能描述:特定功能邏輯 Octal 25 Ohm Bus Transceivers RoHS:否 制造商:Texas Instruments 產品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SN74LVTH18512DGGR | 制造商:Texas Instruments 功能描述:SCOPE 18-BIT UNIV BUS TRANSCEIVER |
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