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參數(shù)資料
| 型號： | SN74BCT8240ADWRE4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | BCT/FBT SERIES, DUAL 4-BIT BOUNDARY SCAN DRIVER, INVERTED OUTPUT, PDSO24 |
| 封裝： | GREEN, PLASTIC, SOIC-24 |
| 文件頁數(shù)： | 5/25頁 |
| 文件大?。?/td> | 457K |
| 代理商： | SN74BCT8240ADWRE4 |
SN54BCT8240A, SN74BCT8240A
SCAN TEST DEVICES
WITH OCTAL INVERTING BUFFERS
SCBS067E – FEBRUARY 1990 – REVISED DECEMBER 1996
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
parallel-signature analysis (PSA)
Data appearing at the device input terminals is compressed into a 16-bit parallel signature in the shift-register
elements of the BSCs on each rising edge of TCK. This data is then updated in the shadow latches of the input
BSCs and applied to the inputs of the normal on-chip logic. Data in the shadow latches of the output BSCs
remains constant and is applied to the device outputs. Figure 6 shows the 16-bit linear-feedback shift-register
algorithm through which the signature is generated. An initial seed value should be scanned into the BSR before
performing this operation.
=
1A1
1Y1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
=
Figure 6. 16-Bit PSA Configuration
simultaneous PSA and PRPG (PSA/PRPG)
Data appearing at the device input terminals is compressed into an 8-bit parallel signature in the shift-register
elements of the input BSCs on each rising edge of TCK. This data is then updated in the shadow latches of the
input BSCs and applied to the inputs of the normal on-chip logic. At the same time, an 8-bit pseudo-random
pattern is generated in the shift-register elements of the output BSCs on each rising edge of TCK, updated in
the shadow latches, and applied to the device output terminals on each falling edge of TCK. Figure 7 shows
the 8-bit linear-feedback shift-register algorithm through which the signature and patterns are generated. An
initial seed value should be scanned into the BSR before performing this operation. A seed value of all zeroes
will not produce additional patterns.
=
1A1
1Y1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
=
Figure 7. 8-Bit PSA / PRPG Configuration
相關(guān)PDF資料 |
PDF描述 |
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| SN74BCT8240ADWR | BCT/FBT SERIES, DUAL 4-BIT BOUNDARY SCAN DRIVER, INVERTED OUTPUT, PDSO24 |
| SN74BCT8244NT-10 | BCT/FBT SERIES, DUAL 4-BIT BOUNDARY SCAN DRIVER, TRUE OUTPUT, PDIP24 |
| SNJ54BCT8244JT-00 | BCT/FBT SERIES, DUAL 4-BIT BOUNDARY SCAN DRIVER, TRUE OUTPUT, CDIP24 |
| SN74BCT8245DW | BCT/FBT SERIES, 8-BIT BOUNDARY SCAN TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| SNJ54BCT8245FK | BCT/FBT SERIES, 8-BIT BOUNDARY SCAN TRANSCEIVER, TRUE OUTPUT, CQCC28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74BCT8240ADWRG4 | 功能描述:特定功能邏輯 IEEE Std 1149.1 Bndry Sacn Tst Devic RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SN74BCT8240ANT | 功能描述:緩沖器和線路驅(qū)動(dòng)器 Device w/Octal Inverting Buffers RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74BCT8240ANTE4 | 功能描述:特定功能邏輯 Device w/Octal Inverting Buffers RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SN74BCT8244ADW | 功能描述:特定功能邏輯 Device w/Octal Buffers RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SN74BCT8244ADWE4 | 功能描述:特定功能邏輯 Device w/Octal Buffers RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
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