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參數(shù)資料
| 型號(hào)： | SN74ABT18640DLR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ABT SERIES, DUAL 9-BIT BOUNDARY SCAN TRANSCEIVER, INVERTED OUTPUT, PDSO56 |
| 封裝： | GREEN, PLASTIC, SSOP-56 |
| 文件頁數(shù)： | 4/32頁 |
| 文件大小： | 638K |
| 代理商： | SN74ABT18640DLR |
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SN54ABT18640, SN74ABT18640
SCAN TEST DEVICES
WITH 18-BIT INVERTING BUS TRANSCEIVERS
SCBS267C – FEBRUARY 1994 – REVISED JULY 1996
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
bypass scan
This instruction conforms to the IEEE Standard 1149.1-1990 BYPASS instruction. The bypass register is
selected in the scan path. A logic 0 value is captured in the bypass register during Capture-DR. The device
operates in the normal mode.
control boundary to high impedance
This instruction conforms to the IEEE Standard 1149.1a-1993 HIGHZ instruction. The bypass register is
selected in the scan path. A logic 0 value is captured in the bypass register during Capture-DR. The device
operates in a modified test mode in which all device I/O pins are placed in the high-impedance state, the device
input pins remain operational, and the normal on-chip logic function is performed.
control boundary to 1/0
This instruction conforms to the IEEE Standard 1149.1a-1993 CLAMP instruction. The bypass register is
selected in the scan path. A logic 0 value is captured in the bypass register during Capture-DR. Data in the input
BSCs is applied to the inputs of the normal on-chip logic, while data in the I/O BSCs for pins in the output mode
is applied to the device I/O pins. The device operates in the test mode.
boundary-run test
The bypass register is selected in the scan path. A logic 0 value is captured in the bypass register during
Capture-DR. The device operates in the test mode. The test operation specified in the BCR is executed during
Run-Test/Idle. The five test operations decoded by the BCR are: sample inputs/toggle outputs (TOPSIP),
PRPG, PSA, simultaneous PSA and PRPG (PSA/PRPG), and simultaneous PSA and binary count up
(PSA/COUNT).
boundary read
The BSR is selected in the scan path. The value in the BSR remains unchanged during Capture-DR. This
instruction is useful for inspecting data after a PSA operation.
boundary self test
The BSR is selected in the scan path. All BSCs capture the inverse of their current values during Capture-DR.
In this way, the contents of the shadow latches can be read out to verify the integrity of both shift-register and
shadow-latch elements of the BSR. The device operates in the normal mode.
boundary toggle outputs
The bypass register is selected in the scan path. A logic 0 value is captured in the bypass register during
Capture-DR. Data in the shift-register elements of the selected output-mode BSCs is toggled on each rising
edge of TCK in Run-Test/Idle, updated in the shadow latches, and applied to the associated device I/O pins on
each falling edge of TCK in Run-Test/Idle. Data in the input-mode BSCs remains constant. Data appearing at
the device input or I/O pins is not captured in the input-mode BSCs. The device operates in the test mode.
boundary-control-register scan
The BCR is selected in the scan path. The value in the BCR remains unchanged during Capture-DR. This
operation must be performed before a boundary-run test operation to specify which test operation is to
be executed.
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| SN74ABT18640DLRG4 | 功能描述:特定功能邏輯 Device w/18-Bit Inv Bus Transceiver RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SN74ABT18646 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:WITH 18-BIT TRANSCEIVER AND REGISTER |
| SN74ABT18646PM | 功能描述:特定功能邏輯 Device w/18-Bit Bus Trnscvr & Register RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SN74ABT18646PMG4 | 功能描述:特定功能邏輯 Device w/18-Bit Bus Trnscvr & Register RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SN74ABT18652 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SCAN TEST DEVICES WITH 18-BIT BUS TRANSCEIVERS AND REGISTERS |
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