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參數(shù)資料
| 型號： | SN54GTL1655HV |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | GTL/TVC SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CQFP68 |
| 封裝： | CERAMIC, QFP-68 |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 266K |
| 代理商： | SN54GTL1655HV |
SN54GTL1655, SN74GTL1655
16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS
WITH LIVE INSERTION
SCBS696E – JULY 1997 – REVISED NOVEMBER 1999
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Notes 4 through 6)
SN54GTL1655
SN74GTL1655
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
BIAS VCC
Supply voltage
3
3.3
3.6
3
3.3
3.6
V
VTT
Termination
GTL
1.14
1.2
1.26
1.14
1.2
1.26
V
VTT
voltage
GTL+
1.35
1.5
1.65
1.35
1.5
1.65
V
VREF
Supply voltage
GTL
0.74
0.8
0.87
0.74
0.8
0.87
V
VREF
Supply voltage
GTL+
0.87
1
1.1
0.87
1
1.1
V
VI
Input voltage
B port
0
VTT
0
VTT
V
VI
Input voltage
Except B port
0
VCC
0
VCC
V
B port
VREF+50 mV
VIH
High-level
VERC
VCC–0.6
VCC
VCC–0.6
VCC
V
VIH
input voltage
Except B port
and ERC
2
V
B port
VREF–50 mV
VIL
Low-level
VERC
GND
0.6
GND
0.6
V
VIL
input voltage
Except B port
and ERC
0.8
V
IIK
Input clamp current
–18
mA
IOH
High-level
output current
A port
–24
mA
IOL
Low-level
A port
24
mA
IOL
output current
B port
100
mA
t/VCC
Power-up ramp rate
200
s/V
TA
Operating free-air temperature
–55
125
–40
85
°C
NOTES:
4. All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
5. Normal connection sequence is GND first, BIAS VCC = 3.3 V second, and VCC = 3.3 V, I/O, control inputs, VTT and VREF (any order)
last. However, if the B-port I/O precharge is not required, the acceptable connection sequence is GND first and VCC = 3.3 V,
BIAS VCC = 3.3 V, I/O, control inputs, VTT and VREF (any order) last. When VCC is connected, the BIAS VCC circuitry is disabled.
6. VTT and RTT can be adjusted to accommodate backplane impedances as long as they do not exceed the DC absolute IOL ratings.
Similarly, VREF can be adjusted to optimize noise margins, but normally is 2/3 VTT.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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