參數(shù)資料
型號: SN54ALVTH32373KR
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: ALVT SERIES, QUAD 8-BIT DRIVER, TRUE OUTPUT, PBGA96
封裝: PLASTIC, FBGA-96
文件頁數(shù): 6/15頁
文件大?。?/td> 356K
代理商: SN54ALVTH32373KR
Product Folder : SN74ALVTH32373 - 2.5-V/3.3-V 32-Bit Transparent D-Type Latches With 3-State Outputs
The ?ALVTH32373 devices are 32-bit transparent D-type latches with 3-state outputs designed for 2.5-V or
3.3-V VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These
devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and
working registers.
These devices can be used as four 8-bit latches, two 16-bit latches, or one 32-bit latch. When the latch-
enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are
latched at the levels set up at the D inputs.
A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state
(high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither
load nor drive the bus lines significantly. The high-impedance state and increased drive provide the
capability to drive bus lines without interface or pullup components.
OE\ does not affect internal operations of the latch. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as
translators in a mixed 3.3-V/5-V system environment.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff
circuitry disables the outputs, preventing damaging current backflow through the devices when they are
powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power
up and power down, which prevents driver conflict.
When VCC is between 0 and 1.2 V, the devices are in the high-impedance state during power up or power
down. However, to ensure the high-impedance state above 1.2 V, OE\ should be tied to VCC through a
pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the
driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN54ALVTH32373 is characterized for operation over the full military temperature range of ?55°C to
125°C. The SN74ALVTH32373 is characterized for operation from ?40°C to 85°C.
Pricing/Packaging/Samples
Price
Packaging
Samples
74ALVTH32373ZKER ACTIVE -40 to 85
1.32 | 1KU
1000
Not Available
SN74ALVTH32373KR ACTIVE -40 to 85
1.87 | 1KU
1000
Contact TI Distributor or Sales
Office
Inventory
TI Inventory Status
Reported Distributor Inventory
74ALVTH32373ZKER
As of 10:38 AM GMT, 4 Jan 2005
In Stock In Progress QTY | Date Lead Time In Stock Distributor: Region | Company Purchase
>10k | 2 Feb
8 Weeks
None Reported
SN74ALVTH32373KR
As of 10:38 AM GMT, 4 Jan 2005
In Stock In Progress QTY | Date Lead Time In Stock Distributor: Region | Company Purchase
>10k | 4 Feb
8 Weeks
>1k
Americas | DigiKey
View all Distributors
* Our information is updated daily, so please check back with us soon if
this does not meet your needs. You may also contact your TI Authorized
Distributor, including those listed above, for real time stock information.
** Lead time information is not available at this time. However, our
information is updated daily so please check back with us soon. Please
contact your preferred TI Authorized Distributor for additional
information.
Quality & Lead (Pb)-Free Data
Product Content
MTBF/FIT Rate
Device
Eco Plan*
Lead/Ball Finish
MSL Rating/Peak Reflow
Details
74ALVTH32373ZKER
Green (RoHS & no Sb/Br)
SNAGCU
Level-3-250C-168 HR
SN74ALVTH32373KR
None
SNPB
Level-3-220C-168 HR
http://focus.ti.com/docs/prod/folders/print/sn74alvth32373.html (2 of 3) [1/5/2005 12:30:18 PM]
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PDF描述
SN54ALVTH32374KR ALVT SERIES, QUAD 8-BIT DRIVER, TRUE OUTPUT, PBGA96
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