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參數(shù)資料
| 型號： | SN54ALVTH32373KR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVT SERIES, QUAD 8-BIT DRIVER, TRUE OUTPUT, PBGA96 |
| 封裝： | PLASTIC, FBGA-96 |
| 文件頁數(shù)： | 5/15頁 |
| 文件大小： | 356K |
| 代理商： | SN54ALVTH32373KR |
Product Folder : SN74ALVTH32373 - 2.5-V/3.3-V 32-Bit Transparent D-Type Latches With 3-State Outputs
Keyword
Part Number
SN74ALVTH32373, Status: ACTIVE
2.5-V/3.3-V 32-Bit Transparent D-Type Latches With 3-State Outputs
Related Products
Simulation Models
Development Tools
Reference Designs
Datasheet
2.5-V/3.3-V 32-Bit Transparent D-Type Latches With 3-State Outputs (Rev.
A) (sn74alvth32373.pdf, 341 KB)
27 Apr 2000 Download
SN74ALVTH32373
Voltage Nodes (V)
3.3, 2.5
Vcc range (V)
2.3 to 3.6
Output Drive (mA)
-8/24
No. of Outputs
32
Static Current
5
th (ns)
1.5
tpd max (ns)
3.5
tsu (ns)
1.5
Logic
True
Product Information
Features
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q
State-of-the-Art Advanced BiCMOS Technology (ABT) Widebus+ Design for 2.5-V and 3.3-V
Operation and Low Static-Power Dissipation
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Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 2.3-V to 3.6-V VCC)
q
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
q
High Drive (?24/24 mA at 2.5-V and ?32/64 mA at 3.3-V VCC)
q
Ioff and Power-Up 3-State Support Hot Insertion
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Use Bus Hold on Data Inputs in Place of External Pullup/Pulldown Resistors to Prevent the Bus From
Floating
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Auto3-State Eliminates Bus Current Loading When Output Exceeds VCC + 0.5 V
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Flow-Through Architecture Facilitates Printed Circuit Board Layout
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Distributed VCC and GND Pins Minimize High-Speed Switching Noise
q
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
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ESD Protection Exceeds JESD 22
r
2000-V Human-Body Model (A114-A)
r
200-V Machine Model (A115-A)
r
1000-V Charged-Device Model (C101)
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Packaged in Plastic Fine-Pitch Ball Grid Array Package
NOTE: For tape and reel order entry:
The GKER package is abbreviated to KR.
Widebus+ is a trademark of Texas Instruments.
Description
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