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參數(shù)資料
| 型號(hào)： | SN54ALVTH16821WD |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVT SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, CDFP56 |
| 封裝： | 0.380 INCH, CERAMIC, FP-56 |
| 文件頁(yè)數(shù)： | 4/11頁(yè) |
| 文件大?。?/td> | 196K |
| 代理商： | SN54ALVTH16821WD |
SN54ALVTH16821, SN74ALVTH16821
2.5-V/3.3-V 20-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCES078E – JULY 1996 – REVISED JANUARY 1999
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high
or low level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
need for interface or pullup components.
OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
When VCC is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.2 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN54ALVTH16821 is characterized for operation over the full military temperature range of –55
°C to
125
°C. The SN74ALVTH16821 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 10-bit section)
INPUTS
OUTPUT
OE
CLK
D
Q
L
↑
H
L
↑
LL
L
H or L
X
Q0
H
X
Z
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