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參數(shù)資料
| 型號(hào)： | SN54ALS323J |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 計(jì)數(shù)移位寄存器 |
| 英文描述： | ALS SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP20 |
| 封裝： | 0.300 INCH, CERAMIC, DIP-20 |
| 文件頁數(shù)： | 1/17頁 |
| 文件大?。?/td> | 693K |
| 代理商： | SN54ALS323J |
SN54ALS323, SN74ALS323
8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS
WITH SYNCHRONOUS CLEAR AND 3-STATE OUTPUTS
SDAS267A – DECEMBER 1982 – REVISED DECEMBER 1994
Copyright
1994, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Multiplexed I/O Ports Provide Improved Bit
Density
Four Modes of Operation:
– Hold (Store)
– Shift Right
– Shift Left
– Load Data
Operate With Outputs Enabled or at High
Impedance
3-State Outputs Drive Bus Lines Directly
Can Be Cascaded for n-Bit Word Lengths
Synchronous Clear
Applications:
– Stacked or Push-Down Registers
– Buffer Storage
– Accumulator Registers
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic (N)
and Ceramic (J) 300-mil DIPs
description
These 8-bit universal shift /storage registers
feature multiplexed input/output (I/O) ports to
achieve full 8-bit data handling in a 20-pin
package. Two function-select (S0, S1) inputs and
two output-enable (OE1, OE2) inputs can be used
to choose the modes of operation listed in the
function table.
Synchronous parallel loading is accomplished by taking both S0 and S1 high. This places the 3-state outputs
in the high-impedance state and permits data applied on the I/O ports to be clocked into the register. Reading
out of the register can be accomplished while the outputs are enabled in any mode. Clearing occurs
synchronously when the clear (CLR) input is low. Taking either OE1 or OE2 high disables the outputs but has
no effect on clearing, shifting, or storing data.
The SN54ALS323 is characterized for operation over the full military temperature range of – 55
°C to 125°C. The
SN74ALS323 is characterized for operation from 0
°C to 70°C.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
S0
OE1
OE2
G/QG
E/QE
C/QC
A/QA
QA′
CLR
GND
VCC
S1
SL
QH′
H/QH
F/QF
D/QD
B/QB
CLK
SR
SN54ALS323 ...J PACKAGE
SN74ALS323 . . . DW OR N PACKAGE
(TOP VIEW)
3
2120 19
910 11 12 13
4
5
6
7
8
18
17
16
15
14
SL
QH′
H/QH
F/QF
D/QD
G/QG
E/QE
C/QC
A/QA
QA′
OE2
OE1
S0
CLK
B/Q
S1
CLR
GND
SR
V
CC
SN54ALS323 . . . FK PACKAGE
(TOP VIEW)
B
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN54ALS648FK | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CQCC28 |
| SN54ALS653-1JT | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDIP24 |
| SN74ALS654-1NT | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDIP24 |
| SN54ALS653-1FK | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CQCC28 |
| SN54AS652FKR | AS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CQCC28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN54ALS32J | 制造商:Texas Instruments 功能描述:QUAD 2-INPUT OR GATE - Rail/Tube |
| SN54ALS33AJ | 制造商:Texas Instruments 功能描述:NOR Gate 4-Element 2-IN Bipolar 14-Pin CDIP Tube |
| SN54ALS352J | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN54ALS353J | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN54ALS373AJ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
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