參數(shù)資料
型號： SMQ320C32PCM60
廠商： TEXAS INSTRUMENTS INC
元件分類： 數(shù)字信號處理
英文描述： 32-BIT, 60 MHz, OTHER DSP, PQFP144
封裝： PLASTIC, QFP-144
文件頁數(shù)： 21/43頁
文件大小： 594K
代理商： SMQ320C32PCM60
SMQ320C32
DIGITAL SIGNAL PROCESSOR
SGUS027C – APRIL 1998 – REVISED OCTOBER 2001
28
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
timing for XF0 when executing STFI or STII (see Figure 21)
NO
’320C32-50
’320C32-60
UNIT
NO.
MIN
MAX
MIN
MAX
UNIT
41
td(H3H-XF0H)
Delay time, H3 high to XF0 high
12
11
ns
XF0 is always set high at the beginning of the execute phase of the interlock-store instruction. When no pipeline conflicts occur, the address of
the store is driven at the beginning of the execute phase of the interlock-store instruction. However, if a pipeline conflict prevents the store from
executing, the address of the store is not driven until the store can execute.
H3
H1
STRBx
R/W
A
D
RDY
XF0
Fetch
STFI or STII
Read
Execute
41
Decode
Figure 21. XF0 When Executing a STFI or STII
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