參數(shù)資料
型號: SMJ320C40TABM40/10
廠商: TEXAS INSTRUMENTS INC
元件分類: 數(shù)字信號處理
英文描述: 32-BIT, 40 MHz, OTHER DSP, UUC325
封裝: TAB-325
文件頁數(shù): 3/64頁
文件大?。?/td> 1155K
代理商: SMJ320C40TABM40/10
SMJ320C40, TMP320C40
DIGITAL SIGNAL PROCESSORS
SGUS017H OCTOBER 1993 REVISED OCTOBER 2001
11
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
SMJ320C40 Signal Descriptions (Continued)
SIGNAL
DESCRIPTION
TYPE
NAME
DESCRIPTION
TYPE
NO. OF
PINS
LOCAL BUS EXTERNAL INTERFACE (80 PINS) (CONTINUED)
LPAGE1
1
O/Z
Page signal for LSTRB1 accesses
LRDY1
1
I
Ready signal for LSTRB1 accesses
LCE1
1
I
Control enable for the LSTRB1, LPAGE1, and LR/W1 signals
COMMUNICATION PORT 0 INTERFACE (12 PINS)
C0D7C0D0
8
I/O
Communication port 0 data bus
CREQ0
1
I/O
Communication port 0 token-request signal
CACK0
1
I/O
Communication port 0 token-request-acknowledge signal
CSTRB0
1
I/O
Communication port 0 data-strobe signal
CRDY0
1
I/O
Communication port 0 data-ready signal
COMMUNICATION PORT 1 INTERFACE (12 PINS)
C1D7C1D0
8
I/O
Communication port 1 data bus
CREQ1
1
I/O
Communication port 1 token-request signal
CACK1
1
I/O
Communication port 1 token-request-acknowledge signal
CSTRB1
1
I/O
Communication port 1 data-strobe signal
CRDY1
1
I/O
Communication port 1 data-ready signal
COMMUNICATION PORT 2 INTERFACE (12 PINS)
C2D7C2D0
8
I/O
Communication port 2 data bus
CREQ2
1
I/O
Communication port 2 token-request signal
CACK2
1
I/O
Communication port 2 token-request-acknowledge signal
CSTRB2
1
I/O
Communication port 2 data-strobe signal
CRDY2
1
I/O
Communication port 2 data-ready signal
COMMUNICATION PORT 3 INTERFACE (12 PINS)
C3D7C3D0
8
I/O
Communication port 3 data bus
CREQ3
1
I/O
Communication port 3 token-request signal
CACK3
1
I/O
Communication port 3 token-request-acknowledge signal
CSTRB3
1
I/O
Communication port 3 data-strobe signal
CRDY3
1
I/O
Communication port 3 data-ready signal
COMMUNICATION PORT 4 INTERFACE (12 PINS)
C4D7C4D0
8
I/O
Communication port 4 data bus
CREQ4
1
I/O
Communication port 4 token-request signal
CACK4
1
I/O
Communication port 4 token-request-acknowledge signal
CSTRB4
1
I/O
Communication port 4 data-strobe signal
CRDY4
1
I/O
Communication port 4 data-ready signal
I = input, O = output, Z = high impedance
STRB0, STRB1 and associated signals (R/W1, R/W0, PAGE0, PAGE1, etc.) are effective over the address ranges defined by the
STRB ACTIVE bits.
§ HFH package has additional power and ground pins to reduce noise problems.
signal descriptions (continued)
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