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參數(shù)資料
| 型號： | SMD1108F |
| 廠商： | Summit Microelectronics, Inc. |
| 英文描述： | 8-Channel Auto-Monitor ADC In System Programmable Analog (ISPA) Device |
| 中文描述： | 8通道自動監(jiān)控ADC的在系統(tǒng)可編程模擬（ISPA）設(shè)備 |
| 文件頁數(shù)： | 14/29頁 |
| 文件大?。?/td> | 734K |
| 代理商： | SMD1108F |
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14
SMD1108
2052 2.0 10/05/01
Preliminary
SUMMIT MICROELECTRONICS, Inc.
REGISTER PARTITIONING
The registers have been divided into two main functional
blocks. The Configuration registers (from 0x80 through
0x95) are the primary setup registers that define the
SMD1108 for its specific application. These registers can
Table 5. Register Address Map
2052 Table05 1.0
be (1) left open for both Read and Write operations, (2)
locked for Write but open for Read, or (3) totally blocked
for both .
The balance of the registers (the GSF registers) will
frequently be used during system operation, so the lock
combinations are more flexible. They can be (1) locked
for Read and Writes, (2) open for Read and Write but
excluding the configuration registers, (3) Read all regis-
ters but Write GSF only, or (4) Read and Write all
registers.
The organization, bit patterns and functions of the regis-
ters are illustrated in Tables 6 through 33.
Registers 80 through 83 set the under-voltage threshold
for the selected channel: CH4 through CH7. The register
value is determined by subtracting 0.9V from the desired
threshold, dividing the result by 0.02 and converting that to
a hexadecimal value.
The formula is (UV
TH
– 0.9) / 0.02 = Decimal value (convert
to hexadecimal).
For example, if the UV threshold is to be 4.6V:
(4.6 – 0.9) / 0.02 = 185
DEC
= B9
HEX
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