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參數(shù)資料
| 型號： | SM8R-67025L-45/883 |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | SRAM |
| 英文描述： | 8K X 16 DUAL-PORT SRAM, 45 ns, CPGA84 |
| 封裝： | PGA-84 |
| 文件頁數(shù)： | 2/23頁 |
| 文件大?。?/td> | 257K |
| 代理商： | SM8R-67025L-45/883 |
M 67025
MATRA MHS
Rev. D (29/09/95)
10
Table 5 : Example Semaphore Procurement Sequence.
FUNCTION
D0 – D15 LEFT
D0 – D15 RIGHT
STATUS
No Action
1
Semaphore free
Left Port Writes ”0” to Semaphore
0
1
Left Port has semaphore token
Right Port Writes ”0” to Semaphore
0
1
No change. Right side has no write
access to semaphore
Left Port Writes ”1” to Semaphore
1
0
Right port obtains semaphore token
Left Port Writes ”0” to Semaphore
1
0
No change. Left port has no write access
to semaphore
Right Port Writes ”1” to Semaphore
0
1
Left port obtains semaphore token
Left Port Writes ”1” to Semaphore
1
Semaphore free
Right Port Writes ”0” to Semaphore
1
0
Right port has semaphore token
Right Port Writes ”1” to Semaphore
1
Semaphore free
Left Port Writes ”0” to Semaphore
0
1
Left Port has semaphore token
Left Port Writes ”1” to Semaphore
1
Semaphore free
Note :
1. This table denotes a sequence of events for only one of the 8 semaphores on the M 67025.
Figure 1. M 67025 – Semaphore Logic.
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