
Product Folder: SMJ320C25, Digital Signal Processors
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On-Chip Clock Generator
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Packaging:
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68-Pin Leaded Ceramic Chip Carrier (FJ Suffix)
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68-Pin Ceramic Grid Array (GB Suffix)
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68-Pin Leadless Ceramic Chip Carrier (FD Suffix)
SMJ320 is a trademark of Texas Instruments Incorporated.
DESCRIPTION
This data sheet provides design documentation for the SMJ320C25 and the SMJ320C25-50 digital signal processor (DSP) devices in the SMJ320 family of VLSI digital signal processors and peripherals. The
SMJ320 family supports a wide range of digital signal processing applications such as tactical communications, guidance, military modems, speech processing, spectrum analysis, audio processing, digital
filtering, high-speed control, graphics, and other computation-intensive applications.
Differences between the SMJ320C25 and the SMJ320C25-50 are specifically identified, as in the following paragraph and in the parameter tables on pages 18 through 24 of this data sheet. When not
specifically differentiated, the term SMJ320C25 is used to describe both devices.
The SMJ320C25 has a 100-ns instruction cycle time. The SMJ320C25-50 has an 80-ns instruction cycle time. With these fast instruction cycle times and their innovative memory configurations, these devices
perform operations necessary for many real-time digital signal processing algorithms. Since most instructions require only one cycle, the SMJ320C25 is capable of executing 12.5 million instructions per
second. On-chip data RAM of 544 16-bit words, on-chip program ROM of 4K words, direct addressing of up to 64K words of external data memory space and 64K words of external program memory space,
and multiprocessor interface features for sharing global memory minimize unnecessary data transfers to take full advantage of the capabilities of the instruction set.
TECHNICAL DOCUMENTS
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DATASHEET
Full datasheet in Acrobat PDF: smj320c25.pdf (582 KB,Rev.D) (Updated: 10/31/2001) APPLICATION NOTES
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MORE LITERATURE
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USER GUIDES
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PRICING/AVAILABILITY/PKG
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