參數(shù)資料
型號： SL28505ALC
元件分類： 時鐘產(chǎn)生/分配
英文描述： PROC SPECIFIC CLOCK GENERATOR, QCC64
封裝： 9 X 9 MM, 0.50 MM PITCH, ROHS COMPLIANT, QFN-64
文件頁數(shù)： 22/28頁
文件大小： 312K
代理商： SL28505ALC
SL28505
Rev 1.0 April 24, 2008
Page 3 of 28
25
SRC1#/LCD_100#/27M_NS
S
O, DIF 100 MHz Differential serial reference clocks/100 MHz LCD video clock. Default
SRC1
26
VSS_PLL3
GND
Ground for PLL3.
27
VDD_PLL3_IO
PWR
3.3V-1.05V power supply for PLL3
28
SRC2/SATA
O, DIF 100 MHz Differential serial reference clocks.
29
SRC2#/SATA#
O, DIF 100 MHz Differential serial reference clocks.
30
VSS_SRC
GND
Ground for outputs.
31
SRC3/CR#_C
I/O,
Dif
100-MHz Differential serial reference clocks / 3.3V OE# input, mappable via
I2C to control either SRC 0 or SRC 2. Default SRC3
32
SRC3#/CR#_D
I/O,
Dif
100-MHz Differential serial reference clocks / 3.3V OE# input, mappable via
I2C to control either SRC 1 or SRC 4. Default SRC3
33
VDD_SRC_IO
PWR
3.3V-1.05V power supply for SRC outputs.
34
SRC4
O, DIF 100 MHz Differential serial reference clocks.
35
SRC4#
O, DIF 100 MHz Differential serial reference clocks.
36
VSS_SRC
GND
Ground for outputs.
37
SRC9
O, DIF 100 MHz Differential serial reference clocks.
38
SRC9#
O, DIF 100 MHz Differential serial reference clocks.
39
SRC11#/CR#_G
I/O,
Dif
100 MHz Differential serial reference clocks/3.3V OE# input controlling SRC9
Default SRC11.
40
SRC11/CR#_H
I/O,
Dif
100 MHz Differential serial reference clocks/3.3V OE# input controlling SRC10.
Default SRC11.
41
SRC10
O, DIF 100 MHz Differential serial reference clocks.
42
SRC#10
O, DIF 100 MHz Differential serial reference clocks.
43
VDD_SRC_IO
PWR
3.3V-1.05V power supply for SRC outputs.
44
CPU_STOP#
I/O,
Dif
3.3V tolerant input for stopping CPU outputs.
45
PCI_STOP#
I/O,
Dif
3.3V tolerant input for stopping PCI and SRC outputs.
46
VDD_SRC
PWR
3.3V Power supply for SRC PLL.
47
SRC6#
O, DIF 100 MHz Differential serial reference clocks.
48
SRC6
O, DIF 100 MHz Differential serial reference clocks.
49
VSS_SRC
GND
Ground for outputs.
50
SRC7#/CR#_E
I/O,
Dif
100 MHz Differential serial reference clocks/3.3V OE# input controlling SRC6.
Default SRC7.
51
SRC7/CR#_F
I/O,
Dif
100 MHz Differential serial reference clocks/3.3V OE# input controlling SRC8.
Default SRC7.
52
VDD_SRC_IO
PWR
3.3V-1.05V power supply for SRC outputs.
53
SRC8#/CPUC2_ITP#
O, DIF Selectable differential CPU or SRC clock output. ITP_EN = 0 @ CK_PWRGD
assertion = SRC8
ITP_EN = 1 @ CK_PWRGD assertion = CPU2
Note: CPU2 is an iAMT clock in iAMT mode depending on the configuration set in Byte
11 Bit3:2.
54
SRC8/CPUT2_ITP
O, DIF Selectable differential CPU or SRC clock output. ITP_EN = 0 @ CK_PWRGD
assertion = SRC8
ITP_EN = 1 @ CK_PWRGD assertion = CPU2
Note: CPU2 is an iAMT clock in iAMT mode depending on the configuration set in Byte
11 Bit3:2.
55
NC
No Connect
56
VDD_CPU_IO
PWR
3.3V-1.05V power supply for CPU outputs.
Pin Definitions (continued)
Pin No.
Name
Type
Description
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參數(shù)描述
SL28506BZC 功能描述:時鐘發(fā)生器及支持產(chǎn)品 CK505 v1.1 PCIe Gen2 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
SL28506BZC-2 功能描述:時鐘發(fā)生器及支持產(chǎn)品 CK505 v1.1 PCIe Gen2 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
SL28506BZC-2T 功能描述:時鐘發(fā)生器及支持產(chǎn)品 CK505 v1.1 PCIe Gen2 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
SL28506BZCT 功能描述:時鐘發(fā)生器及支持產(chǎn)品 CK505 v1.1 PCIe Gen2 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
SL28506BZI 功能描述:時鐘發(fā)生器及支持產(chǎn)品 CK505 v1.1 PCIe Gen2 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
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