參數(shù)資料
型號: SI5364
廠商: Electronic Theatre Controls, Inc.
英文描述: SONET/SDH PRECISION PORT CARD CLOCK IC
中文描述: SONET / SDH的精密端口卡時鐘IC
文件頁數(shù): 33/40頁
文件大?。?/td> 565K
代理商: SI5364
Si5364
Rev. 2.2
33
J2
VALTIME
I*
LVTTL
Clock Validation Time for LOS and FOS.
VALTIME sets the clock validation times for recovery
from an LOS or FOS alarm condition. When VAL-
TIME is high, the validation time is approximately
13 s. When VALTIME is low, the validation time is
approximately 100
ms
.
D3
VSEL33
I*
LVTTL
Select 3.3 V V
DD
Supply.
This is an enable pin for the internal regulator. To
enable the regulator, connect this pin to the V
DD33
pins.
E4–6, F4–6
V
DD33
V
DD
Supply
3.3 V Supply.
3.3 V power is applied to the V
DD33
pins. Typical
supply bypassing/decoupling for this configuration is
indicated in the typical application diagram for 3.3 V
supply operation.
E7–9, F7–9,
G4–8, H8,
J8, K8
V
DD25
V
DD
Supply
2.5 V Supply.
These pins provide a means of connecting the
compensation network for the on-chip regulator.
D4–9, E3,
F3, G3, H3–
7, J5, K5
GND
GND
Supply
Ground.
Must be connected to system ground. Minimize the
ground path impedance for optimal performance of
the device.
K1
REXT
I*
Analog
External Biasing Resistor.
Establishes bias currents within the device. This pin
must be connected to GND through a 10 k
(1%)
resistor.
Table 10. Pin Descriptions (Continued)
I/O
Signal Level
Pin #
Pin Name
Description
*Note:
The LVTTL inputs on the Si5364 device have an internal pulldown mechanism that causes the input to default to a logic
low state if the input is not driven from an external source.
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