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參數(shù)資料
| 型號： | Si5013-X-GM |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | 運動控制電子 |
| 英文描述： | OC-12/3, STM-4/1 SONET/SDH CDR IC WITH LIMITING AMPLIFIER |
| 中文描述： | 的OC - 12 / 3接口，STM - 4 / 1的SONET / SDH的CDR集成電路限幅放大器 |
| 文件頁數(shù)： | 20/24頁 |
| 文件大?。?/td> | 153K |
| 代理商： | SI5013-X-GM |
Si5013
20
Rev. 1.4
20
REXT
External Bias Resistor.
This resistor is used to establish internal bias cur-
rents within the device. This pin must be connected
to GND through a 10 k
1
Differential Clock Output.
The output clock is recovered from the data signal
present on DIN except when LTR is asserted or the
LOL state has been entered.
Clock Disable.
When this input is high, the CLKOUT output drivers
are disabled. For normal operation, this pin should
be low.
Note:
This input has a weak internal pulldown.
Bit Error Rate Level Control.
The BER threshold level is set by applying a volt-
age to this pin. When the BER exceeds the pro-
grammed threshold, BER_ALM is driven low. If this
pin is tied to GND, BER_ALM is disabled. There is
no hysteresis.
Bit Error Rate Alarm.
This pin will be driven low to indicate that the BER
threshold set by BER_LVL has been exceeded. The
alarm will clear after the BER rate has improved by
approximately a factor of 2.
No Connect.
Leave this pin disconnected.
Supply Ground.
Nominally 0.0 V. The GND pad found on the bottom
of the 28-lead MLP (see Figure 16 on page 22)
must be connected
directly to supply ground. Min-
imize the ground path inductance for optimal perfor-
mance.
resistor.
22
23
CLKOUT–
CLKOUT+
O
CML
24
CLKDSBL
I
LVTTL
26
BER_LVL
I
27
BER_ALM
O
LVTTL
28
NC
GND Pad, 2
GND
GND
Table 8. Si5013 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description
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