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參數(shù)資料
| 型號： | Si5013-X-GM |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | 運動控制電子 |
| 英文描述： | OC-12/3, STM-4/1 SONET/SDH CDR IC WITH LIMITING AMPLIFIER |
| 中文描述： | 的OC - 12 / 3接口，STM - 4 / 1的SONET / SDH的CDR集成電路限幅放大器 |
| 文件頁數(shù)： | 19/24頁 |
| 文件大?。?/td> | 153K |
| 代理商： | SI5013-X-GM |
Si5013
Rev. 1.4
19
7
LOL
O
LVTTL
Loss-of-Lock.
This output is driven low when the recovered clock
frequency deviates from the reference clock by the
amount specified in Table 4 on page 9. If no exter-
nal reference is supplied, this signal will be active
when the internal PLL is no longer locked to the
incoming data.
Lock-to-Reference.
When this pin is low, the DSPLL disregards the data
inputs. If an external reference is supplied, the out-
put clock locks to the supplied reference. If no
external reference is used, the DSPLL locks the
control loop until LTR is released.
Note:
This input has a weak internal pullup.
Loss-of-Signal.
This output pin is driven low when the input signal is
below the threshold set via LOS_LVL. (LOS opera-
tion is guaranteed only when ac coupling is used on
the DIN inputs.)
Data Squelch.
When driven high, this pin forces the data present
on DOUT+ to zero and DOUT– to one. For normal
operation, this pin should be low. DSQLCH may be
used during LOS/LOL conditions to prevent random
data from being presented to the system.
Note:
This input has a weak internal pulldown.
Supply Voltage.
Nominally 3.3 V.
Differential Data Input.
Clock and data are recovered from the differential
signal present on these pins. AC coupling is recom-
mended.
Production Test Input.
This pin is used during production testing and
must
be tied to GND for normal operation.
Differential Data Output.
The data output signal is a retimed version of the
data recovered from the signal present on DIN. It is
phase aligned with CLKOUT and is updated on the
rising edge of CLKOUT.
Reset/Calibrate.
Driving this input high for at least 1 s will reset
internal device circuitry. A high to low transition on
this pin will force a DSPLL calibration. For normal
operation, drive this pin low.
Note:
This input has a weak internal pulldown.
8
LTR
I
LVTTL
9
LOS
O
LVTTL
10
DSQLCH
LVTTL
11,14,18,21,
25
12
13
VDD
3.3 V
DIN+
DIN–
I
See Table 2
15
GND
GND
16
17
DOUT–
DOUT+
O
CML
19
RESET/CAL
I
LVTTL
Table 8. Si5013 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description
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