- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374749 > SDA5649 (SIEMENS A G) Expanded Decoder for Program Delivery Control and Video Program System EPDC / VPS Decoder PDF資料下載
參數(shù)資料
| 型號： | SDA5649 |
| 廠商： | SIEMENS A G |
| 元件分類： | 圖文 |
| 英文描述： | Expanded Decoder for Program Delivery Control and Video Program System EPDC / VPS Decoder |
| 中文描述： | TELETEXT AND VPS/PDC DECODER, PDIP14 |
| 封裝： | DIP-14 |
| 文件頁數(shù)： | 7/26頁 |
| 文件大?。?/td> | 479K |
| 代理商： | SDA5649 |
第1頁第2頁第3頁第4頁第5頁第6頁當(dāng)前第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁
SDA 5649
SDA 5649X
Semiconductor Group
50
Control Register
Default: All bits are set to 0 on power-up.
Bits 3 through 7 are used for test purposes and must not be changed for normal operation by user
software!
Bit 0:
Determines, which kind of data is accessed via the
I
2
C-Bus when PDC mode is active.
Bit 1:
Determines the operating mode.
Bit 2:
Determines whether BDSP 8/30/1-data or header row data is accessible.
Read Mode
For reading from the PDC decoder, the following format has to be used.
The contents of up to 13 registers (bytes) can be read starting with byte 1 bit 7 (refer to the table
Order of Data Output on the
I
2
C-Bus and …
) depending on the selected operating mode.
Bit Number
7
6
5
4
3
2
1
0
T4
T3
T2
T1
T0
HDT
PDC/
VPS
FOR1/
FOR2
Value
0
1
BDSP
8/ 30/ 2
data accessible
BDSP 8/ 30/ 1 or
header row
data accessible (refer to description of Bit 2)
Value
0
1
VPS mode active
PDC mode active
Value
0
1
BDSP 8/30/1 data accessible
Bytes no.38 through 45 of the header row
containing clock time accessible
START Chipaddress Read Mode
AS
1st Byte
AM
…
Last Byte
NAM
STOP
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| sda 5649x | VPS-Decoder(VPS解碼器) |
| sda 5649 | VPS-Decoder(VPS解碼器) |
| SDA6102X | TV SAT PLL WITH I2C BUS AND FOUR CHIP ADDRESSES |
| SDA6310 | DSR QPSK-Demodulator |
| SDA9188-3X | Picture-in-Picture Processor with On-Chip PLL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SDA5649X | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Expanded Decoder for Program Delivery Control and Video Program System EPDC / VPS Decoder |
| SDA5650 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:VPS / PDC-plus Decoder |
| SDA5650X | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:VPS / PDC-plus Decoder |
| SDA6000 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Teletext Decoder with Embedded 16-bit Controller |
| SDA601 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TSG 601 Serial Component Generator, SDA 601 Serial Digital Analyzer |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。