
TE
CH
tm
FREQUENCY vs. AC PARAMETER RELATIONAHIP TABLE 
T431616A-6S                                                                           (Unit : number of clock) 
t
RC
t
RAS
Frequency 
Latency 
60ns 
42ns 
166MHz(6.0ns) 
3 
10 
7 
143MHz(7.0ns) 
3 
9 
6 
125MHz(8.0ns) 
2 
9 
6 
111MHz(9.0ns) 
2 
7 
5 
100MHz(10.0ns) 
2 
7 
5 
T431616A-7S                                                                           (Unit : number of clock) 
t
RC
t
RAS
Frequency 
Latency 
63ns 
42ns 
143MHz(7.0ns) 
3 
9 
6 
125MHz(8.0ns) 
3 
9 
6 
111MHz(9.0ns) 
2 
8 
5 
100MHz(10.0ns) 
2 
7 
5 
83MHz(12.0ns) 
2 
6 
4 
T431616A-8S                                                                           (Unit : number of clock) 
t
RC
t
RAS
Frequency 
Latency 
68ns 
48ns 
125MHz(8.0ns) 
3 
9 
6 
111MHz(9.0ns) 
3 
9 
6 
100MHz(10.0ns) 
2 
7 
5 
83MHz(12.0ns) 
2 
6 
4 
75MHz(13.0ns) 
2 
6 
4 
T431616A-10S                                                                          (Unit : number of clock) 
t
RC
t
RAS
Frequency 
Latency 
70ns 
50ns 
100MHz(10.0ns) 
2 
7 
5 
83MHz(12.0ns) 
2 
7 
5 
75MHz(13.0ns) 
2 
6 
4 
66MHz(15.0ns) 
2 
6 
4 
60MHz(16.7ns) 
2 
5 
3 
Note : 1. 
t
RDL 
≥
16.7ns is recommended for T431616A 
base
T431616A
Taiwan Memory Technology, Inc. reserves the right
P.10 
to change products or specifications without notice. 
Publication Date: DEC. 2000 
Revision: C
t
RP
18ns 
3 
3 
3 
2 
2 
t
RRD
12ns 
2 
2 
2 
2 
2 
t
RCD
16ns 
3 
3 
2 
2 
2 
t
CCD
6ns 
1 
1 
1 
1 
1 
t
CDL
6ns 
1 
1 
1 
1 
1 
t
RDL
12ns 
2 
2 
2 
2 
2 
CAS 
t
RP
20ns 
3 
3 
3 
2 
2 
t
RRD
14ns 
2 
2 
2 
2 
2 
t
RCD
16ns 
3 
2 
2 
2 
2 
t
CCD
7ns 
1 
1 
1 
1 
1 
t
CDL
7ns 
1 
1 
1 
1 
1 
t
RDL
14ns 
2 
2 
2 
2 
2 
CAS 
t
RP
20ns 
3 
3 
2 
2 
2 
t
RRD
16ns 
2 
2 
2 
2 
2 
t
RCD
20ns 
3 
3 
2 
2 
2 
t
CCD
8ns 
1 
1 
1 
1 
1 
t
CDL
8ns 
1 
1 
1 
1 
1 
t
RDL
16ns 
2 
2 
2 
2 
2 
CAS 
t
RP
20ns 
2 
2 
2 
2 
2 
t
RRD
20ns 
2 
2 
2 
2 
2 
t
RCD
20ns 
2 
2 
2 
2 
2 
t
CCD
10ns 
1 
1 
1 
1 
1 
t
CDL
10ns 
1 
1 
1 
1 
1 
t
RDL
20ns 
2 
2 
2 
2 
Note 1 
CAS 
            2.   Clock count formula :  clock  
≥
period
clock
value
 (round off whole number).