參數(shù)資料
型號: SCAN162512ASM
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 總線收發(fā)器
英文描述: SCAN/JTAG/3J SERIES, DUAL 8-BIT BOUNDARY SCAN TRANSCEIVER, TRUE OUTPUT, PBGA64
封裝: BGA-64
文件頁數(shù): 1/11頁
文件大?。?/td> 163K
代理商: SCAN162512ASM
SCAN16512A
Low Voltage Universal 16-bit IEEE 1149.1 Bus
Transceiver with TRI-STATE Outputs
General Description
The SCAN16512A is a high speed, low-power universal bus
transceiver featuring data inputs organized into two 8-bit
bytes with output enable and latch enable control signals.
This function is configurable as a D-type Latch or Flip-Flop,
and can operate in transparent, latched, or clocked mode.
This device is compliant with IEEE 1149.1 Standard Test
Access Port and Boundary Scan Architecture with the incor-
poration of the defined boundary-scan test logic and test
access port consisting of Test Data Input (TDI), Test Data
Out (TDO), Test Mode Select (TMS), Test Clock (TCK), and
Test Reset (TRST).
Features
n
IEEE 1149.1 (JTAG) Compliant
n
2.7V to 3.6V V
CC Operation
n
TRI-STATE outputs for bus-oriented applications
n
Dual byte-wide data for bus applications
n
Power down high Impedance inputs and outputs
n
Optional Bus Hold on data inputs eliminates the need
for external pullup/pulldown resistors (SCANH16512A,
SCANH162512A versions)
n
Optional 25
series resistors in outputs to minimize
noise and eliminate termination resistors
(SCAN162512A, SCANH162512A versions)
n
Supports live insertion/withdrawal
n
Includes CLAMP and HIGHZ instructions
Block Diagram
20075302
February 2004
SCAN16512A
Low
V
oltage
Universal
16-bit
IEEE
1
149.1
Bus
T
ransceiver
with
TRI-ST
A
T
E
Outputs
2004 National Semiconductor Corporation
DS200753
www.national.com
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