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參數(shù)資料
| 型號： | SC9RS08KA1J3CDB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PDSO6 |
| 封裝： | 3 X 3 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, DFN-6 |
| 文件頁數(shù)： | 118/134頁 |
| 文件大小： | 3114K |
| 代理商： | SC9RS08KA1J3CDB |
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Analog Comparator (RS08ACMPV1)
SC9RS08KA2 Series Data Sheet, Rev. 1
84
Freescale Semiconductor
10.1.1
Features
The ACMP has the following features:
Full rail-to-rail supply operation
Less than 40 mV of input offset
Less than 15 mV of hysteresis
Selectable interrupt on rising edge, falling edge, or either rising or falling edges of comparator
output
Option to compare to fixed internal bandgap reference voltage
Option to allow comparator output to be visible on a pin, ACMPO
Remains operational in stop mode
10.1.2
Modes of Operation
This section defines the ACMP operation in wait, stop, and background debug modes.
10.1.2.1
Operation in Wait Mode
The ACMP continues to operate in wait mode if enabled before executing the WAIT instruction.
Therefore, the ACMP can be used to bring the MCU out of wait mode if the ACMP interrupt is enabled
(ACIE = 1). For lowest possible current consumption, the ACMP should be disabled by software if not
required as an interrupt source during wait mode.
10.1.2.2
Operation in Stop Mode
The ACMP continues to operate in stop mode if enabled and compare operation remains active. If ACOPE
is enabled, comparator output operates as in the normal operating mode and comparator output is placed
onto the external pin. The MCU is brought out of stop when a compare event occurs and ACIE is enabled;
ACF flag sets accordingly.
If stop is exited with a reset, the ACMP will be put into its reset state.
10.1.2.3
Operation in Active Background Mode
When the MCU is in active background mode, the ACMP will continue to operate normally.
10.1.3
Block Diagram
The block diagram for the analog comparator module is shown in Figure 10-2.
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| SC9RS08KA1J3CPC | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:RS08 Microcontrollers |
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