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參數(shù)資料
| 型號： | SC660EYB |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | SMBus System Clock Buffer for Mobile Applications |
| 中文描述： | LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | SSOP-28 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 57K |
| 代理商： | SC660EYB |
SC660E
SMBus System Clock Buffer for Mobile Applications
Cypress Semiconductor Corporation
3901 North First Street
San Jose, CA 95134. Tel: 408-043-2600
http://www.cypress.com
Document#: 38-07025 Rev. *A
12/17/2002
Page 5 of 8
Electrical Characteristics
Characteristic
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
Output Low Voltage
IOL = 40mA
Output High Voltage
IOH = 30mA
Tri-State leakage Current
Symbol
VIL
VIH
IIL
IIH
VOL
Min
Typ
Max
Units
Vdc
Vdc
μA
μA
Vdc
Conditions
-
-
-
0.8
-
-
-
2.0
-66
66
0.4
-
-
All Outputs (see buffer spec)
VOH
2.4
-
-
Vdc
All Outputs Using 3.3V Power
(see buffer spec)
Ioz
Idd
66
-
-
-
-
10
160
μA
mA
Dynamic Supply Current
Input frequency = 66 Mhz - All outputs on
and at 30 pF load
Input frequency 100 Mhz - All outputs on
and at 30 pF load
All outputs disabled no input clock
1 output at a time - 30 seconds
.8 to 2.4 volts
Idd
100
-
-
220
mA
Static Supply Current
Short Circuit Current
Input Rise Time
Isdd
ISC
TIR
-
-
-
-
4
-
-
mA
mA
nS
25
2.4
VDD = VDD1 thru VDD5 =3.3V
±
5
%, , TA = -40oC to +85oC
Switching Characteristics
Characteristic
Output Duty Cycle
Buffer out/out Skew All
Buffer Outputs
Buffer input to output Skew
Jitter Cycle to Cycle*
Jitter Absolute (Peak to
Peak)*
Symbol
Min
45
Typ
50
Max
Units
Conditions
Measured at 1.5V (50/50 in)
35 pF Load Measured at 1.5V
-
55
250
%
pS
tSKEW
-
-
tSKEW
TJCC
TJabs
2.0
4.0
5.0
50
150
nS
pS
pS
@ 35 pF loading
@ 35 pF loading
VDD = VDD1 thru VDD5 = 3.3V
±
5
%, , TA = -40oC to +85oC
*This jitter is additive to the input clock’s jitter.
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