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Applications Information (continued)
Capacitor Selection
The output capacitors are chosen based on required ESR
and capacitance. The ESR requirement is driven by the
output ripple requirement and the DC tolerance. The
output voltage has a DC value that is equal to the valley
of the output ripple, plus of the peak-to-peak ripple.
Changing the ripple voltage will lead to a change in DC
output voltage.
The design goal is +/-4% output regulation. The internal
750mV reference tolerance is 1%, and assuming 1% toler-
ance for the FB resistor divider, this allows 2% tolerance
due to VOUT ripple. Since this 2% error comes from of
the ripple voltage, the allowable ripple is 4%, or 72mV for
a 1.8V output. Although this is acceptable from a regula-
tion standpoint, 72mV ripple is high for a 1.8V output and
therefore more realistic ripple value of 36mV will be used
(2% of VOUT).
The maximum ripple current of 4.2A creates a ripple volt-
age across the ESR. The maximum ESR value allowed
would create 36mV ripple:
ESR
MAX
= V
RIPPLE
/I
RIPPLEMAX
= 36mV / 4.2A
ESR
MAX
= 8.6 mΩ
While the ESR is chosen to meet ripple requirements,
the output capacitance (μF) is typically chosen based on
transient requirements. A worst-case load release, from
maximum load to no load at the exact moment when in-
ductor current is at the peak, defines the required capaci-
tance. If the load release is instantaneous (load changes
from maximum to zero in a very small time), the output
capacitor must absorb all the inductor’s stored energy.
This will cause a peak voltage on the capacitor according
to the equation:
COUT
MIN
=
L × (IOUT + 1/2 × I
)
2
___________________
(V
PEAK
2
- VOUT
2
)
With a peak voltage VPEAK of 1.98V (180mV or 10% rise
above 1.8V upon load release), the required capacitance
is:
COUT
MIN
=
1.5μH × (10 + 1/2 × 4.2)
2
___________________
(1.98
2
- 1.8
2
)
COUT
MIN
= 323μF
The previous requirements (323μF, 6.4mΩ) will be met
using a single 330μF 6mΩ device.
Note that output voltage ripple is often higher than ex-
pected due to the ESL (inductance) of the capacitor. See
the FB/VOUT Ripple section.
If the load release is relatively slow, the output capaci-
tance can be reduced. At heavy loads during normal
switching, when the FB pin is above the 750mV refer-
ence, the DL output is high and the low-side MOSFET is
on. During this time, the voltage across the inductor is
approximately -VOUT. This causes a down-slope or fall-
ing di/dt in the inductor. If the load di/dt is not much
faster than the di/dt in the inductor, then the inductor
current can track the changing load current, and there
will be relatively less overshoot from a load release. The
following can be used to calculate the needed capaci-
tance for a given dILOAD/dt.
Peak inductor current:
IL
PEAK
= ILOAD
MAX
+ 1/2 × I
RIPPLEMAX
IL
PEAK
= 10 + 1/2 × 4.2 = 12.1A
Rate of change of Load current = dILOAD/dt
IMAX = maximum DC load current = 10A
COUT = IL
× (L ×IL
/ V
- IMAX/(dILOAD /dt))
2 × (V
PEAK
- VOUT)
___________________________________
Example: Load dI/dt = 2.5A/μsec