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參數(shù)資料
| 型號(hào)： | SC402BMLTRT |
| 廠商： | Semtech |
| 文件頁數(shù)： | 17/32頁 |
| 文件大小： | 1425K |
| 描述： | IC REG DL BCK/LINEAR SYNC 32MLPQ |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | EcoSpeed®, SmartDrive™ |
| 拓?fù)洌?/td> | 降壓（降壓）同步（1），線性（LDO）（1） |
| 功能： | 任何功能 |
| 輸出數(shù)： | 2 |
| 頻率 - 開關(guān)： | 1MHz |
| 電壓/電流 - 輸出 1： | 可調(diào)至 0.6V，10A |
| 電壓/電流 - 輸出 2： | 可調(diào)至 0.75V，200mA |
| 帶 LED 驅(qū)動(dòng)器： | 無 |
| 帶監(jiān)控器： | 無 |
| 帶序列發(fā)生器： | 是 |
| 電源電壓： | 3 V ~ 28 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 32-MLPQ（5x5） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | SC402BMLDKR |
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SC402B
17
One-Shot Timer and Operating Frequency
The one-shot timer operates as shown in Figure 2. The FB
Comparator output goes high when V
FB
is less than the
internal 600mV reference. This feeds into the gate drive
and turns on the high-side MOSFET, and also starts the
one-shot timer. The one-shot timer uses an internal com-
parator and a capacitor. One comparator input is con-
nected to V
OUT
, the other input is connected to the
capacitor. When the on-time begins, the internal capaci-
tor charges from zero volts through a current which is
proportional to V
IN
. When the capacitor voltage reaches
V
OUT
, the on-time is completed and the high-side MOSFET
turns off.
Gate
Drives
FB Comparator
One-Shot
Timer
On-time = K x R
TON
x (V
OUT
/V
IN
)
V
OUT
V
IN
FB
REF
Q1
Q2
L
C
OUT
V
IN
ESR
+
V
OUT
V
LX
FB
DH
DL
R
TON
+
-
Figure 2 On-Time Generation
This method automatically produces an on-time that is
proportional to V
OUT
and inversely proportional to V
IN
.
Under steady-state conditions, the switching frequency
can be determined from the on-time by the following
equation.
IN
ON
OUT
SW
V
T
V
f
The SC402B uses an external resistor to set the on-time
which indirectly sets the frequency. The on-time can be
programmed to provide an operating frequency up to
1MHz using a resistor between the TON pin and ground.
The resistor value is selected by the following equation.
SW
TON
f
pF
25
k
R
The constant, k, equals 1 when VDD is greater than 3.6V. If
VDD is less than 3.6V and V
IN
is greater than (VDD -1.75) x 10,
k is shown by the following equation.
The maximum R
TON
value allowed is shown by the follow-
ing equation.
A
15
V
R
MIN
_
IN
MAX
_
TON
V
OUT
Voltage Selection
The switcher output voltage is regulated by comparing
V
OUT
as seen through a resistor divider at the FB pin to the
internal 600mV reference voltage, see Figure 3.
R
1
To FB pin
R
2
V
OUT
Figure 3 Output Voltage Selection
Note that this control method regulates the valley of the
output ripple voltage, not the DC value. The DC output
voltage V
OUT
is offset by the output ripple according to the
following equation.
2
V
R
R
1
6
.
0
V
RIPPLE
2
1
OUT
When a large capacitor is placed in parallel with R
1
(C
TOP
)
V
OUT
is shown by the following equation.
2
TOP
1
2
1
2
2
TOP
1
RIPPLE
2
1
OUT
C
R
R
R
R
1
)
C
R
(
1
2
V
R
R
1
6
.
0
V
Enable and Power-save Inputs
The EN/PSV input is used to enable or disable the switch-
ing regulator. When EN/PSV is low (grounded), the switch-
ing regulator is off and in its lowest power state. When off,
the output of the switching regulator soft-discharges the
output into a 15& internal resistor via the VOUT pin. When
EN/PSV is allowed to float, the pin voltage will float to 33%
of the voltage at VDD. The switching regulator turns on
with power-save disabled and all switching is in forced
continuous mode.
When EN/PSV is high (above 44% of the voltage at VDD),
the switching regulator turns on with power save enabled.
Applications Information (continued)
IN
V
10
75
.
1
VDD
k
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