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參數(shù)資料
| 型號(hào)： | SC2463TSTRT |
| 廠商： | Semtech |
| 文件頁數(shù)： | 14/23頁 |
| 文件大?。?/td> | 459K |
| 描述： | IC REG QD BCK/LINEAR 28TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 拓?fù)洌?/td> | 降壓（降壓）同步（2），線性（LDO）（2） |
| 功能： | 任何功能 |
| 輸出數(shù)： | 4 |
| 頻率 - 開關(guān)： | 600kHz |
| 電壓/電流 - 輸出 1： | 控制器 |
| 電壓/電流 - 輸出 2： | 控制器 |
| 電壓/電流 - 輸出 3： | 控制器 |
| 帶 LED 驅(qū)動(dòng)器： | 無 |
| 帶監(jiān)控器： | 無 |
| 帶序列發(fā)生器： | 是 |
| 電源電壓： | 4.5 V ~ 30 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-TSSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 1358 (CN2011-ZH PDF) |
| 其它名稱： | SC2463TSDKR |
14
?2007 Semtech Corp.
www.semtech.com
SC2463
POWER MANAGEMENT
Applications Information (Cont.)
design, the equivalent ESR should be evaluated at the
ripple frequency for voltage ripple calculation when both
ceramic and electrolytic capacitors are used. If R
1a
= R
1b
= R
1
and C
1a
= C
1b
= C
1
, then R
eq
and C
eq
will be frequency-
independent and
R
eq
= 1/2 R
1
and C
eq
= 2C
1
.
Input Capacitor (C
Input Capacitor (C
Input Capacitor (C
Input Capacitor (C
Input Capacitor (C
in
in
in
in
in
)))))
The input supply to the converter usually comes from a
pre-regulator. Since the input supply is not ideal, input
capacitors are needed to filter the current pulses at the
switching frequency. A simple buck converter is shown in
Figure 3.
Figure 3. A simple model for the converter input
In Figure 3 the DC input voltage source has an internal
impedance R
in
and the input capacitor C
in
has an ESR of
R
esr
. MOSFET and input capacitor current waveforms, ESR
voltage ripple and input voltage ripple are shown in Figure
4.
Figure 4. Typical waveforms at converter input
It can be seen that the current in the input capacitor
pulses with high di/dt. Capacitors with low ESL should be
used. It is also important to place the input capacitor
close to the MOSFETs on the PC board to reduce trace
inductances around the pulse current loop.
The RMS value of the capacitor current is approximately
].
)
D
1
(
D
)
D
1
)(
12
1
[(
D
I
I
2
2
2
o
Cin
?/DIV>
+
?/DIV>
?/DIV>
+
=
The power dissipated in the input capacitors is then
P
Cin
= I
Cin
2
R
esr
.
For reliable operation, the maximum power dissipation
in the capacitors should not result in more than 10
o
C of
temperature rise. Many manufacturers specify the
maximum allowable ripple current (ARMS) rating of the
capacitor at a given ripple frequency and ambient
temperature. The input capacitance should be high
enough to handle the ripple current. For higher power
applications, multiple capacitors are placed in parallel to
increase the ripple current handling capability.
Sometimes meeting tight input voltage ripple
specifications may require the use of larger input
capacitance. At full load, the peak-to-peak input voltage
ripple due to the ESR is
.
I
)
2
1
(
R
v
o
esr
ESR
?/DIV>
+
=
The peak-to-peak input voltage ripple due to the capacitor
is
,
f
C
DI
v
s
in
o
C
H
From these two expressions, C
IN
can be found to meet
the input voltage ripple specification. In a multi-phase
converter, channel interleaving can be used to reduce
ripple. The two step-down channels of the SC2463
operate at 180 degrees from each other. If both step-
down channels in the SC2463 are connected in parallel,
both the input and the output RMS currents will be
reduced.
Ripple cancellation effect of interleaving allows the use
of smaller input capacitors. When converter outputs are
connected in parallel and interleaved, smaller inductors
and capacitors can be used for each channel. The total
output ripple-voltage remains unchanged. Smaller
inductors speeds up output load transient.
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