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參數(shù)資料
| 型號： | SC16C752 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Dual UART with 64-byte FIFO |
| 中文描述： | 雙UART具有64字節(jié)FIFO |
| 文件頁數(shù)： | 18/47頁 |
| 文件大?。?/td> | 604K |
| 代理商： | SC16C752 |
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Philips Semiconductors
SC16C752
Dual UART with 64-byte FIFO
Product data
Rev. 04 — 20 June 2003
18 of 47
9397 750 11635
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
7.
Register descriptions
Each register is selected using address lines A0, A1, A2, and in some cases, bits
from other registers. The programming combinations for register selection are shown
in
Table 9
.
[1]
[2]
[3]
[4]
[5]
[6]
MCR[7] can only be modified when EFR[4] is set.
Accessed by a combination of address pins and register bits.
Accessible only when LCR[7] is logic 1.
Accessible only when LCR is set to 10111111 (8hBF).
Accessible only when EFR[4] = 1 and MCR[6] = 1, i.e., EFR[4] and MCR[6] are read/write enables.
Accessible only when CSA or CSB = 0, MCR[2] = 1, and loop-back is disabled (MCR[4] = 0).
Fig 12. Crystal oscillator connections.
002aaa169
X1
1.8432 MHz
C1
22 pF
C2
47 pF
X
X
X1
1.8432 MHz
C1
47 pF
C2
100 pF
X
X
1.5 k
Table 9:
A2
0
0
0
0
1
1
1
1
0
0
0
1
1
1
1
1
1
1
Register map - read/write properties
A0
Read mode
0
receive holding register (RHR)
1
interrupt enable register (IER)
0
interrupt identification register (IIR)
1
line control register (LCR)
0
modem control register (MCR)
[1]
1
line status register (LSR)
0
modem status register (MSR)
1
scratchpad register (SPR)
0
divisor latch LSB (DLL)
[2]
,
[3]
1
divisor latch MSB (DLH)
[2]
,
[3]
0
enhanced feature register (EFR)
[2]
,
[4]
0
Xon1 word
[2]
,
[4]
1
Xon2 word
[2]
,
[4]
0
Xoff1 word
[2]
,
[4]
1
Xoff2 word
[2]
,
[4]
0
transmission control register (TCR)
[2]
,
[5]
transmission control register
[2]
,
[5]
1
trigger level register (TLR)
[2]
,
[5]
1
FIFO ready register
[2]
,
[6]
A1
0
0
1
1
0
0
1
1
0
0
1
0
0
1
1
1
1
1
Write mode
transmit holding register (THR)
interrupt enable register
FIFO control register (FCR)
line control register
modem control register
[1]
scratchpad register
divisor latch LSB
[2]
,
[3]
divisor latch MSB
[2]
,
[3]
enhanced feature register
[2]
,
[4]
Xon1 word
[2]
,
[4]
Xon2 word
[2]
,
[4]
Xoff1 word
[2]
,
[4]
Xoff2 word
[2]
,
[4]
trigger level register
[2]
,
[5]
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| SC16C752B | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs |
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