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| 型號(hào)： | SC1201UFH-266 |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 266 MHz, MICROPROCESSOR, PBGA481 |
| 封裝： | 40 X 40 MM, 2.38 MM HEIGHT, 1.27 MM PITCH, MS-034BAU1, TEPBGA-481 |
| 文件頁(yè)數(shù)： | 270/465頁(yè) |
| 文件大?。?/td> | 4068K |
| 代理商： | SC1201UFH-266 |
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AMD Geode SC1200/SC1201 Processor Data Book
341
Video Processor Module
Revision 7.1
7.2.2.2
Horizontal Downscaler with 4-Tap Filtering
The Video Processor implements up to 8:1 horizontal
downscaling with 4-tap filtering for horizontal interpolation.
Filtering is performed on video data input to the Video Pro-
cessor. This data is fed to the filter and then to the down-
scaler. There is a bypass path for both filtering and
downscaling logic. If this bypass is enabled, video data is
written directly into the line buffers. (See Figure 7-8.)
Filtering
There are four 4-bit coefficients which can have pro-
grammed values of 0 to 15. The filter coefficients can be
programmed via the Video Downscaler Coefficient register
(F4BAR0+Memory Offset 40h) to increase picture quality.
Horizontal Downscaler
The Video Processor supports horizontal downscaling. The
downscaler can be implemented in the Video Processor to
shrink the video window by a factor of up to 8:1, in 1-pixel
increments. The downscaler factor (m) is programmed in
the Video Downscaler Control register (F4BAR0+Memory
Offset 3Ch[4:1]). If bit 0 of this register is set to 0, the down-
scaler logic is bypassed.
The horizontal downscaler supports downscaling of video
data input format YUV 4:2:2 only.
The downscaler supports up to 29 downscaler factors.
There are two types of factors:
Type A is (1/m+1). One pixel is retained, and m pixels
are dropped. This enables downscaling factors of 1/16,
1/15, 1/14, 1/13, 1/12, 1/11, 1/10, 1/9,1/8, 1/7, 1/6, 1/5,
1/4, 1/3, and 1/2.
Type B is (m/m+1). m pixels are retained, and one pixel
is dropped. This enables downscaling factors of 2/3, 3/4,
4/5, 5/6, 6/7, 7/8, 8/9, 9/10, 10/11, 11/12, 12/13, 13/14,
14/15, and 15/16.
Bit
6
of
the
Video
Downscaler
Control
register
(F4BAR0+Memory Offset 3Ch) selects the type of down-
scaling factor to be used.
Note:
There is no vertical downscaling in the Video Pro-
cessor.
Maintaining Aspect Ratio
The main purpose of the horizontal downscaler is to main-
tain the aspect ratio of graphics data displayed on a TV,
which was originally generated for CRT display.
NTSC has an aspect ratio that is slightly different than a
CRT. When graphics is generated for a CRT and is dis-
played on a TV, the resulting TV image is narrowed. To cor-
rect the aspect ratio, graphics data should be generated in
640x480 resolution. The full screen video is in 720x480
resolution. The 4-tap horizontal downscaler must be
enabled to bring the video data down to the same resolu-
tion as the graphics data to allow for proper mixing/blend-
ing. In the TVOUT block (see Section 7.2.4 on page 349)
there is a horizontal upscaler/downscaler which is used to
bring the mixed/blended data back up to the required
720x480 resolution for TV. This process stretches the
graphics data horizontally and corrects the aspect ratio.
PAL also has an aspect ratio different than a CRT. But
instead of the graphics being narrowed, it is stretched. To
correct this aspect ratio error the graphics data should be
generated in 768x576 resolution. The full screen video res-
olution is 720x576 and it must be scaled up using the hori-
zontal upscaler (see Section 7.2.2.5) to 768x576. In the
TVOUT block the horizontal upscaler/downscaler is used to
downscale the mixed/blended data to the required 720x576
resolution. This process narrows the graphics data horizon-
tally and corrects the aspect ratio.
For both NTSC and PAL, using the two scalers reduces the
quality of the video. Graphics data aspect ratio correction
should only be done when the graphics data (such as inter-
net content) is generated expecting a CRT display’s aspect
ratio. When graphics data is the only content viewed, this 4-
tap horizontal downscaler is not used but the TVOUT
block’s horizontal upscaler should still be used for graphics
data aspect ratio correction.
Figure 7-8. Horizontal Downscaler Block Diagram
Bypass
4-Tap
Horizontal
4x4
Downscale
Video
Input
Filtering
Coefficients
Downscaler
Factors
To Line
Buffers
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SC1201UCL-266 | 32-BIT, 266 MHz, MICROPROCESSOR, PBGA432 |
| SC1201UCL-266F | 32-BIT, 266 MHz, MICROPROCESSOR, PBGA432 |
| SC12484CV-80 | PALETTE-DAC DSPL CTLR, PQCC44 |
| SC11483CV-110 | PALETTE-DAC DSPL CTLR, PQCC44 |
| SC11483CV-80 | PALETTE-DAC DSPL CTLR, PQCC44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SC1201UFH-266B | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SC1201UFH-266F | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SC1201UFH-266FR | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SC1202 | 制造商:SEMTECH 制造商全稱(chēng):Semtech Corporation 功能描述:600mA Low Dropout Positive Voltage Regulator |
| SC1202_04 | 制造商:SEMTECH 制造商全稱(chēng):Semtech Corporation 功能描述:600mA Low Dropout Positive Voltage Regulator |
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