參數(shù)資料
型號(hào): SB80L186EB8
廠商: INTEL CORP
元件分類(lèi): 微控制器/微處理器
英文描述: 16-BIT, 8 MHz, MICROPROCESSOR, PQFP80
封裝: SHRINK, QFP-80
文件頁(yè)數(shù): 50/59頁(yè)
文件大?。?/td> 664K
代理商: SB80L186EB8
80C186EB80C188EB 80L186EB80L188EB
INSTRUCTION SET SUMMARY (Continued)
80C186EB
80C188EB
Function
Format
Clock
Comments
Cycles
DATA TRANSFER
(Continued)
SEGMENT e Segment Override
CS
00101110
2
SS
00110110
2
DS
00111110
2
ES
00100110
2
ARITHMETIC
ADD e Add
Regmemory with register to either
000000dw
mod reg r m
310
Immediate to registermemory
100000sw
mod000 r m
data
data if s we01
416
Immediate to accumulator
0000010w
data
data if we1
34
816-bit
ADC e Add with carry
Regmemory with register to either
000100dw
mod reg r m
310
Immediate to registermemory
100000sw
mod010 r m
data
data if s we01
416
Immediate to accumulator
0001010w
data
data if we1
34
816-bit
INC e Increment
Registermemory
1111111w
mod000 r m
315
Register
01000 reg
3
SUB e Subtract
Regmemory and register to either
001010dw
mod reg r m
310
Immediate from registermemory
100000sw
mod101 r m
data
data if s we01
416
Immediate from accumulator
0010110w
data
data if we1
34
816-bit
SBB e Subtract with borrow
Regmemory and register to either
000110dw
mod reg r m
310
Immediate from registermemory
100000sw
mod011 r m
data
data if s we01
416
Immediate from accumulator
0001110w
data
data if we1
34
816-bit
DEC e Decrement
Registermemory
1111111w
mod001 r m
315
Register
01001 reg
3
CMP e Compare
Registermemory with register
0011101w
mod reg r m
310
Register with registermemory
0011100w
mod reg r m
310
Immediate with registermemory
100000sw
mod111 r m
data
data if s we01
310
Immediate with accumulator
0011110w
data
data if we1
34
816-bit
NEG e
Change sign registermemory
1111011w
mod011 r m
310
AAA e
ASCII adjust for add
00110111
8
DAA e
Decimal adjust for add
00100111
4
AAS e
ASCII adjust for subtract
00111111
7
DAS e
Decimal adjust for subtract
00101111
4
MUL e
Multiply (unsigned)
1111011w
mod 100 r m
Register-Byte
26–28
Register-Word
35–37
Memory-Byte
32–34
Memory-Word
41–43
Shaded areas indicate instructions not available in 80868088 microsystems
NOTE
Clock cycles shown for byte transfers For word operations add 4 clock cycles for all memory transfers
54
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